Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 482 1 T2 1 T4 1 T26 2
all_values[1] 455 1 T4 1 T26 2 T29 3
all_values[2] 488 1 T4 1 T29 5 T333 2
all_values[3] 481 1 T2 1 T29 7 T333 10
all_values[4] 498 1 T26 1 T29 5 T333 6
all_values[5] 468 1 T4 1 T29 5 T333 5
all_values[6] 476 1 T4 3 T29 5 T333 8
all_values[7] 484 1 T29 7 T333 5 T73 1
all_values[8] 497 1 T4 2 T26 1 T29 2
all_values[9] 472 1 T4 1 T29 4 T333 8
all_values[10] 481 1 T2 1 T29 7 T333 8
all_values[11] 473 1 T4 2 T29 5 T333 3
all_values[12] 431 1 T2 1 T4 3 T29 3
all_values[13] 443 1 T2 1 T4 1 T26 1
all_values[14] 482 1 T4 1 T26 1 T29 4
all_values[15] 455 1 T4 2 T29 7 T333 7
all_values[16] 492 1 T4 2 T29 7 T333 7
all_values[17] 487 1 T26 1 T29 4 T333 5
all_values[18] 481 1 T2 2 T26 1 T29 4
all_values[19] 488 1 T2 1 T29 4 T333 4
all_values[20] 488 1 T2 1 T4 1 T26 2
all_values[21] 506 1 T2 1 T29 4 T333 4
all_values[22] 465 1 T2 1 T29 1 T333 4
all_values[23] 472 1 T2 1 T29 2 T333 3

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