Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 460 1 T3 1 T8 5 T14 8
all_values[1] 505 1 T8 5 T14 5 T19 6
all_values[2] 507 1 T3 1 T8 7 T14 4
all_values[3] 506 1 T3 2 T8 6 T14 4
all_values[4] 513 1 T3 1 T8 5 T14 6
all_values[5] 552 1 T3 1 T8 7 T14 9
all_values[6] 534 1 T3 2 T8 3 T14 8
all_values[7] 543 1 T8 6 T14 3 T18 1
all_values[8] 522 1 T3 2 T8 4 T14 2
all_values[9] 504 1 T8 4 T14 6 T19 6
all_values[10] 555 1 T8 3 T14 3 T19 5
all_values[11] 541 1 T8 8 T14 3 T19 7
all_values[12] 525 1 T8 4 T14 5 T18 1
all_values[13] 517 1 T3 1 T8 5 T14 8
all_values[14] 540 1 T8 8 T14 8 T19 3
all_values[15] 517 1 T3 1 T8 5 T14 10
all_values[16] 497 1 T3 2 T8 5 T14 8
all_values[17] 552 1 T8 4 T14 6 T18 2
all_values[18] 496 1 T8 6 T14 5 T19 2
all_values[19] 512 1 T8 4 T14 9 T19 5
all_values[20] 507 1 T8 5 T14 11 T18 1
all_values[21] 528 1 T8 2 T14 4 T19 8
all_values[22] 551 1 T3 1 T8 5 T14 7
all_values[23] 551 1 T8 3 T14 10 T18 1

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