Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 531 1 T2 4 T14 1 T5 3
all_values[1] 608 1 T2 2 T4 1 T5 3
all_values[2] 517 1 T2 3 T7 1 T14 1
all_values[3] 534 1 T2 3 T7 2 T4 1
all_values[4] 554 1 T2 8 T7 3 T14 1
all_values[5] 556 1 T2 1 T15 1 T5 5
all_values[6] 548 1 T2 2 T5 3 T16 10
all_values[7] 554 1 T1 1 T2 3 T4 1
all_values[8] 519 1 T2 2 T4 1 T15 1
all_values[9] 527 1 T2 1 T7 1 T4 2
all_values[10] 528 1 T2 2 T7 1 T4 1
all_values[11] 520 1 T5 2 T16 8 T17 11
all_values[12] 542 1 T2 2 T7 1 T4 1
all_values[13] 529 1 T15 2 T5 3 T16 5
all_values[14] 549 1 T2 1 T4 1 T14 1
all_values[15] 545 1 T5 1 T16 15 T17 11
all_values[16] 573 1 T2 5 T7 1 T4 1
all_values[17] 584 1 T2 3 T5 4 T16 3
all_values[18] 558 1 T2 4 T7 2 T15 2
all_values[19] 539 1 T2 1 T7 1 T14 1
all_values[20] 543 1 T1 1 T2 1 T15 2
all_values[21] 497 1 T7 1 T4 2 T14 1
all_values[22] 550 1 T2 5 T14 1 T5 4
all_values[23] 536 1 T2 4 T7 1 T4 2

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