Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 524 1 T7 1 T10 2 T24 9
all_values[1] 542 1 T12 1 T24 6 T20 2
all_values[2] 478 1 T7 1 T24 4 T20 2
all_values[3] 505 1 T10 2 T24 3 T20 2
all_values[4] 485 1 T12 1 T24 2 T20 2
all_values[5] 542 1 T10 1 T24 4 T20 2
all_values[6] 533 1 T10 1 T12 1 T24 16
all_values[7] 549 1 T24 3 T20 5 T21 2
all_values[8] 524 1 T10 1 T24 7 T20 5
all_values[9] 537 1 T10 3 T24 4 T20 1
all_values[10] 511 1 T10 3 T12 1 T24 7
all_values[11] 544 1 T12 1 T24 6 T20 1
all_values[12] 505 1 T9 1 T10 1 T12 1
all_values[13] 552 1 T7 1 T10 1 T12 1
all_values[14] 527 1 T24 4 T20 2 T21 1
all_values[15] 502 1 T7 1 T12 1 T24 5
all_values[16] 528 1 T9 1 T10 1 T24 5
all_values[17] 522 1 T24 4 T20 6 T70 5
all_values[18] 524 1 T12 1 T24 9 T21 1
all_values[19] 519 1 T10 1 T12 1 T24 1
all_values[20] 510 1 T7 1 T10 1 T24 8
all_values[21] 581 1 T12 1 T24 6 T20 1
all_values[22] 517 1 T7 1 T10 2 T24 6
all_values[23] 499 1 T24 2 T20 5 T70 6

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