Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 444 1 T3 1 T28 1 T20 2
all_values[1] 444 1 T3 1 T8 1 T14 1
all_values[2] 448 1 T20 1 T140 5 T26 4
all_values[3] 467 1 T3 2 T18 2 T20 4
all_values[4] 477 1 T8 2 T11 1 T20 1
all_values[5] 469 1 T11 1 T20 2 T65 1
all_values[6] 419 1 T3 1 T8 1 T14 3
all_values[7] 465 1 T28 1 T140 2 T25 1
all_values[8] 420 1 T8 1 T11 1 T14 1
all_values[9] 448 1 T3 1 T8 1 T11 1
all_values[10] 448 1 T8 2 T11 2 T14 2
all_values[11] 458 1 T18 1 T28 2 T20 2
all_values[12] 471 1 T3 1 T8 1 T11 1
all_values[13] 456 1 T3 1 T8 1 T11 1
all_values[14] 472 1 T8 1 T11 1 T18 1
all_values[15] 440 1 T14 2 T18 2 T28 1
all_values[16] 436 1 T3 1 T8 2 T14 1
all_values[17] 474 1 T1 1 T3 1 T20 1
all_values[18] 462 1 T8 1 T11 1 T14 1
all_values[19] 432 1 T8 1 T11 1 T18 1
all_values[20] 465 1 T3 1 T8 1 T11 1
all_values[21] 486 1 T3 1 T8 2 T11 1
all_values[22] 448 1 T8 1 T14 3 T65 1
all_values[23] 480 1 T3 1 T11 1 T14 1

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