Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 474 1 T3 1 T7 3 T6 7
all_values[1] 464 1 T7 2 T6 5 T15 2
all_values[2] 453 1 T7 4 T6 5 T15 1
all_values[3] 477 1 T7 4 T6 9 T15 2
all_values[4] 442 1 T3 1 T7 2 T6 3
all_values[5] 449 1 T7 6 T6 2 T15 1
all_values[6] 463 1 T7 5 T6 2 T15 2
all_values[7] 449 1 T7 2 T6 5 T16 1
all_values[8] 443 1 T7 4 T6 5 T22 7
all_values[9] 444 1 T7 4 T6 4 T15 1
all_values[10] 442 1 T7 5 T6 1 T15 2
all_values[11] 451 1 T3 1 T7 7 T6 8
all_values[12] 460 1 T7 3 T6 5 T15 1
all_values[13] 454 1 T3 1 T7 4 T6 1
all_values[14] 456 1 T7 3 T6 4 T15 1
all_values[15] 485 1 T3 2 T7 4 T6 3
all_values[16] 457 1 T3 2 T7 4 T6 9
all_values[17] 478 1 T7 4 T6 4 T15 1
all_values[18] 481 1 T7 4 T6 6 T15 1
all_values[19] 466 1 T7 3 T6 4 T15 2
all_values[20] 455 1 T3 1 T7 4 T6 7
all_values[21] 483 1 T1 1 T7 6 T6 3
all_values[22] 495 1 T3 1 T7 3 T6 3
all_values[23] 493 1 T7 7 T6 5 T15 4

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