Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 510 1 T3 2 T7 1 T10 1
all_values[1] 443 1 T7 1 T4 3 T19 1
all_values[2] 530 1 T7 3 T10 1 T15 1
all_values[3] 487 1 T3 1 T7 2 T15 2
all_values[4] 471 1 T3 2 T10 1 T4 9
all_values[5] 496 1 T3 1 T7 3 T4 12
all_values[6] 451 1 T7 1 T10 1 T15 1
all_values[7] 490 1 T3 1 T7 1 T15 2
all_values[8] 462 1 T3 1 T7 1 T4 7
all_values[9] 511 1 T3 2 T7 1 T15 1
all_values[10] 529 1 T3 1 T7 2 T16 1
all_values[11] 508 1 T3 1 T10 1 T15 1
all_values[12] 501 1 T3 4 T7 4 T10 2
all_values[13] 507 1 T7 3 T10 1 T4 10
all_values[14] 515 1 T3 1 T7 3 T10 1
all_values[15] 497 1 T3 1 T7 3 T10 1
all_values[16] 446 1 T3 1 T7 1 T10 2
all_values[17] 437 1 T3 1 T16 1 T4 7
all_values[18] 458 1 T3 2 T7 1 T10 1
all_values[19] 489 1 T3 1 T7 1 T15 1
all_values[20] 476 1 T3 2 T7 2 T4 8
all_values[21] 462 1 T10 3 T16 1 T4 6
all_values[22] 544 1 T7 2 T10 1 T16 2
all_values[23] 479 1 T7 1 T10 2 T4 11

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