Unified Coverage Report :: Group :: xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

Group : xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

---

Summary for Group xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	64	0	64	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	1927	1			T2	5		T9	7		T19	6
all_values[1]	1867	1			T2	8		T9	9		T19	5
all_values[2]	1883	1			T2	4		T9	7		T19	10
all_values[3]	1993	1			T2	9		T9	6		T19	5
all_values[4]	1904	1			T2	7		T9	3		T19	6
all_values[5]	1987	1			T2	4		T9	5		T19	13
all_values[6]	1927	1			T2	12		T9	7		T19	5
all_values[7]	1846	1			T2	7		T9	2		T19	6
all_values[8]	1882	1			T2	4		T9	8		T19	1
all_values[9]	1978	1			T2	8		T9	6		T19	5
all_values[10]	1863	1			T2	9		T9	7		T19	5
all_values[11]	1954	1			T2	10		T9	6		T19	4
all_values[12]	1867	1			T2	8		T9	7		T19	8
all_values[13]	1878	1			T2	7		T9	6		T19	9
all_values[14]	1859	1			T2	10		T9	8		T19	6
all_values[15]	1854	1			T2	5		T9	10		T19	3
all_values[16]	2017	1			T2	14		T9	12		T19	6
all_values[17]	1869	1			T2	6		T9	6		T19	4
all_values[18]	1939	1			T2	5		T9	6		T19	3
all_values[19]	1858	1			T2	8		T9	8		T19	7
all_values[20]	1846	1			T2	1		T9	5		T19	3
all_values[21]	1866	1			T2	11		T9	7		T19	6
all_values[22]	1875	1			T2	8		T9	9		T19	5
all_values[23]	1945	1			T2	4		T9	15		T19	7
all_values[24]	1924	1			T2	10		T9	5		T19	9
all_values[25]	1911	1			T2	4		T9	10		T19	7
all_values[26]	1881	1			T2	7		T9	4		T19	5
all_values[27]	1976	1			T2	13		T9	9		T19	2
all_values[28]	1978	1			T2	8		T9	5		T19	8
all_values[29]	1937	1			T2	8		T9	8		T19	7
all_values[30]	1887	1			T2	13		T9	5		T19	6
all_values[31]	1894	1			T2	8		T9	8		T19	6
all_values[32]	1977	1			T2	8		T9	5		T19	7
all_values[33]	1862	1			T2	10		T9	7		T19	5
all_values[34]	1899	1			T2	8		T9	5		T19	8
all_values[35]	1912	1			T2	4		T9	8		T19	6
all_values[36]	1869	1			T2	8		T9	8		T19	4
all_values[37]	1874	1			T2	6		T9	8		T19	10
all_values[38]	1916	1			T2	10		T9	5		T19	5
all_values[39]	1987	1			T2	6		T9	6		T19	7
all_values[40]	1914	1			T2	8		T9	7		T19	6
all_values[41]	1894	1			T2	8		T9	7		T19	6
all_values[42]	1960	1			T2	9		T9	9		T19	4
all_values[43]	1962	1			T2	7		T9	3		T19	4
all_values[44]	1886	1			T2	7		T9	8		T19	4
all_values[45]	1827	1			T2	12		T9	8		T19	5
all_values[46]	1811	1			T2	9		T9	14		T19	7
all_values[47]	2002	1			T2	5		T9	13		T19	7
all_values[48]	1886	1			T2	3		T9	2		T19	6
all_values[49]	1878	1			T2	7		T9	5		T19	8
all_values[50]	1959	1			T2	7		T9	10		T19	1
all_values[51]	1900	1			T2	8		T9	14		T19	6
all_values[52]	1907	1			T2	7		T9	4		T19	7
all_values[53]	1994	1			T2	5		T9	11		T19	7
all_values[54]	1914	1			T2	7		T9	10		T19	5
all_values[55]	1862	1			T2	13		T9	5		T19	5
all_values[56]	1854	1			T2	5		T9	10		T19	6
all_values[57]	1933	1			T2	12		T9	7		T19	4
all_values[58]	1892	1			T2	8		T9	12		T19	3
all_values[59]	1920	1			T2	7		T9	5		T19	3
all_values[60]	1900	1			T2	7		T9	7		T19	7
all_values[61]	1948	1			T2	8		T9	7		T19	8
all_values[62]	2032	1			T2	4		T9	9		T19	3
all_values[63]	1897	1			T2	9		T9	13		T19	4