Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 531 1 T3 2 T29 2 T21 5
all_values[1] 499 1 T3 1 T8 2 T29 2
all_values[2] 493 1 T29 3 T21 1 T26 1
all_values[3] 496 1 T29 2 T21 2 T44 3
all_values[4] 489 1 T3 1 T29 3 T21 2
all_values[5] 481 1 T29 2 T21 1 T44 1
all_values[6] 485 1 T8 1 T29 1 T21 1
all_values[7] 468 1 T29 5 T21 3 T98 2
all_values[8] 467 1 T8 2 T29 4 T21 5
all_values[9] 500 1 T8 1 T29 2 T21 1
all_values[10] 506 1 T29 3 T21 1 T44 1
all_values[11] 490 1 T8 1 T29 3 T21 4
all_values[12] 492 1 T29 1 T21 2 T98 6
all_values[13] 478 1 T29 2 T21 2 T26 2
all_values[14] 474 1 T29 4 T21 3 T98 1
all_values[15] 482 1 T3 1 T8 2 T21 5
all_values[16] 459 1 T29 1 T21 2 T44 1
all_values[17] 466 1 T29 3 T21 1 T98 3
all_values[18] 498 1 T3 1 T8 2 T29 2
all_values[19] 457 1 T29 1 T98 1 T161 1
all_values[20] 509 1 T3 1 T29 4 T98 3
all_values[21] 519 1 T29 3 T21 2 T98 3
all_values[22] 484 1 T29 1 T21 2 T98 3
all_values[23] 511 1 T8 1 T29 1 T21 1

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