Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 566 1 T3 1 T21 4 T22 2
all_values[1] 485 1 T21 1 T22 2 T30 2
all_values[2] 541 1 T1 1 T3 1 T8 1
all_values[3] 517 1 T3 4 T21 1 T22 3
all_values[4] 510 1 T8 2 T11 2 T21 1
all_values[5] 512 1 T17 3 T22 3 T30 4
all_values[6] 518 1 T8 1 T11 2 T21 4
all_values[7] 540 1 T21 4 T22 5 T30 4
all_values[8] 509 1 T1 1 T11 1 T17 3
all_values[9] 531 1 T3 1 T11 2 T21 1
all_values[10] 543 1 T11 1 T21 1 T22 1
all_values[11] 524 1 T1 1 T3 1 T8 2
all_values[12] 549 1 T21 3 T22 3 T30 1
all_values[13] 521 1 T3 1 T8 2 T11 1
all_values[14] 489 1 T3 3 T8 1 T11 2
all_values[15] 499 1 T8 1 T11 1 T21 1
all_values[16] 540 1 T3 1 T8 2 T11 1
all_values[17] 570 1 T3 1 T8 1 T11 2
all_values[18] 544 1 T11 2 T21 7 T22 4
all_values[19] 493 1 T8 2 T11 1 T17 1
all_values[20] 548 1 T8 2 T21 1 T22 3
all_values[21] 522 1 T8 2 T17 2 T21 2
all_values[22] 526 1 T11 2 T21 3 T22 3
all_values[23] 485 1 T1 2 T3 1 T8 1

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