Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 516 1 T27 4 T18 4 T19 1
all_values[1] 498 1 T14 1 T27 7 T18 4
all_values[2] 484 1 T9 2 T27 4 T18 8
all_values[3] 489 1 T2 2 T9 2 T27 5
all_values[4] 477 1 T9 1 T27 6 T18 5
all_values[5] 468 1 T2 1 T9 3 T14 1
all_values[6] 494 1 T2 1 T12 3 T14 2
all_values[7] 483 1 T12 1 T14 1 T18 6
all_values[8] 432 1 T12 1 T27 5 T18 9
all_values[9] 461 1 T2 3 T12 1 T27 2
all_values[10] 502 1 T9 1 T12 1 T27 3
all_values[11] 504 1 T2 1 T9 1 T14 1
all_values[12] 484 1 T2 1 T14 3 T27 1
all_values[13] 492 1 T9 1 T27 3 T18 5
all_values[14] 458 1 T9 3 T12 1 T27 6
all_values[15] 453 1 T2 2 T12 1 T27 2
all_values[16] 535 1 T2 1 T9 1 T12 1
all_values[17] 474 1 T2 2 T9 1 T12 2
all_values[18] 503 1 T2 1 T9 2 T12 1
all_values[19] 531 1 T9 1 T12 2 T14 1
all_values[20] 460 1 T2 1 T27 5 T18 5
all_values[21] 515 1 T2 1 T9 2 T12 1
all_values[22] 447 1 T14 1 T27 8 T18 6
all_values[23] 482 1 T9 2 T14 1 T27 2

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