Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 522 1 T1 1 T18 1 T20 8
all_values[1] 503 1 T16 1 T19 3 T20 6
all_values[2] 519 1 T1 1 T18 3 T19 6
all_values[3] 472 1 T9 1 T16 3 T18 2
all_values[4] 513 1 T16 2 T18 3 T19 2
all_values[5] 495 1 T16 2 T18 3 T19 3
all_values[6] 511 1 T16 5 T18 3 T19 6
all_values[7] 510 1 T16 1 T19 3 T20 7
all_values[8] 470 1 T16 2 T18 3 T19 2
all_values[9] 502 1 T16 1 T17 1 T18 5
all_values[10] 500 1 T18 1 T19 1 T20 6
all_values[11] 475 1 T18 3 T19 3 T20 3
all_values[12] 528 1 T16 1 T18 1 T19 2
all_values[13] 514 1 T16 5 T18 4 T19 6
all_values[14] 457 1 T16 3 T18 4 T19 1
all_values[15] 471 1 T9 1 T16 1 T18 1
all_values[16] 498 1 T16 2 T19 3 T20 9
all_values[17] 464 1 T16 3 T18 1 T19 4
all_values[18] 485 1 T16 2 T19 1 T20 9
all_values[19] 451 1 T16 1 T18 3 T19 2
all_values[20] 511 1 T16 4 T18 1 T19 2
all_values[21] 477 1 T16 2 T18 3 T19 2
all_values[22] 483 1 T16 2 T18 2 T19 2
all_values[23] 495 1 T16 2 T19 4 T20 7

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