Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 477 1 T12 2 T13 5 T17 1
all_values[1] 479 1 T12 15 T13 4 T21 3
all_values[2] 506 1 T12 4 T13 5 T21 8
all_values[3] 478 1 T12 7 T13 1 T17 2
all_values[4] 477 1 T12 4 T13 10 T17 3
all_values[5] 481 1 T12 2 T13 1 T21 4
all_values[6] 477 1 T12 5 T13 5 T21 6
all_values[7] 495 1 T12 1 T13 3 T17 2
all_values[8] 495 1 T12 5 T13 6 T17 2
all_values[9] 509 1 T12 6 T13 6 T17 2
all_values[10] 468 1 T11 1 T12 6 T13 4
all_values[11] 477 1 T12 3 T13 4 T17 2
all_values[12] 485 1 T12 5 T13 5 T17 1
all_values[13] 511 1 T12 6 T13 9 T17 1
all_values[14] 494 1 T12 2 T13 3 T17 3
all_values[15] 466 1 T11 1 T12 5 T13 3
all_values[16] 451 1 T11 1 T12 7 T13 2
all_values[17] 516 1 T12 9 T13 3 T17 2
all_values[18] 502 1 T12 5 T13 1 T21 5
all_values[19] 486 1 T11 1 T12 6 T13 5
all_values[20] 461 1 T12 9 T13 2 T21 6
all_values[21] 520 1 T12 6 T13 2 T21 3
all_values[22] 441 1 T2 1 T12 6 T13 4
all_values[23] 465 1 T12 4 T13 3 T17 1

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