Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 394 1 T11 9 T19 1 T21 1
all_values[1] 458 1 T11 6 T17 1 T19 3
all_values[2] 450 1 T11 8 T19 1 T21 1
all_values[3] 460 1 T2 1 T11 8 T19 2
all_values[4] 475 1 T11 4 T23 1 T17 1
all_values[5] 494 1 T2 1 T11 10 T18 1
all_values[6] 435 1 T2 1 T11 9 T19 1
all_values[7] 425 1 T11 2 T33 6 T30 6
all_values[8] 475 1 T2 1 T11 7 T18 1
all_values[9] 475 1 T2 2 T11 7 T19 3
all_values[10] 483 1 T2 1 T11 7 T19 2
all_values[11] 480 1 T11 4 T18 1 T19 1
all_values[12] 476 1 T11 4 T17 1 T19 2
all_values[13] 475 1 T11 3 T19 2 T21 1
all_values[14] 467 1 T11 6 T18 1 T19 1
all_values[15] 463 1 T11 4 T19 3 T33 5
all_values[16] 482 1 T2 1 T11 7 T19 4
all_values[17] 475 1 T2 1 T11 11 T19 2
all_values[18] 469 1 T11 5 T17 1 T18 1
all_values[19] 447 1 T11 8 T17 1 T18 1
all_values[20] 438 1 T11 4 T18 1 T19 1
all_values[21] 465 1 T11 6 T18 3 T186 2
all_values[22] 420 1 T11 10 T23 1 T19 3
all_values[23] 461 1 T11 9 T17 1 T33 5

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