Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 524 1 T8 1 T40 1 T17 3
all_values[1] 477 1 T10 1 T40 1 T19 8
all_values[2] 479 1 T8 1 T10 1 T40 1
all_values[3] 476 1 T8 1 T19 2 T184 6
all_values[4] 496 1 T8 1 T17 1 T19 7
all_values[5] 473 1 T19 4 T42 1 T20 1
all_values[6] 500 1 T40 1 T19 5 T184 4
all_values[7] 492 1 T19 3 T20 1 T184 4
all_values[8] 501 1 T8 2 T40 2 T19 15
all_values[9] 464 1 T11 1 T17 1 T19 9
all_values[10] 478 1 T8 1 T11 1 T19 1
all_values[11] 490 1 T2 1 T8 1 T10 1
all_values[12] 452 1 T19 8 T20 1 T184 5
all_values[13] 468 1 T8 1 T40 1 T19 3
all_values[14] 471 1 T40 3 T17 1 T19 5
all_values[15] 499 1 T8 2 T11 1 T19 6
all_values[16] 504 1 T2 1 T19 4 T184 3
all_values[17] 515 1 T8 1 T40 1 T19 2
all_values[18] 469 1 T8 1 T17 1 T19 8
all_values[19] 502 1 T19 6 T184 4 T71 5
all_values[20] 486 1 T19 15 T71 15 T172 1
all_values[21] 489 1 T40 2 T17 1 T19 11
all_values[22] 485 1 T19 5 T20 1 T184 3
all_values[23] 507 1 T8 2 T11 1 T16 1

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