Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 553 1 T4 1 T11 1 T41 2
all_values[1] 544 1 T4 1 T11 4 T30 5
all_values[2] 489 1 T11 3 T41 5 T177 4
all_values[3] 541 1 T30 2 T41 2 T177 13
all_values[4] 524 1 T4 1 T11 2 T30 2
all_values[5] 543 1 T4 1 T30 3 T41 4
all_values[6] 471 1 T11 3 T30 3 T41 6
all_values[7] 462 1 T4 1 T11 2 T30 3
all_values[8] 529 1 T4 2 T30 2 T41 9
all_values[9] 512 1 T11 1 T30 5 T41 8
all_values[10] 567 1 T4 1 T11 2 T30 4
all_values[11] 495 1 T4 1 T11 2 T30 1
all_values[12] 517 1 T4 2 T11 3 T30 1
all_values[13] 496 1 T11 1 T30 2 T41 6
all_values[14] 497 1 T11 1 T30 4 T41 6
all_values[15] 491 1 T11 2 T30 3 T41 7
all_values[16] 485 1 T4 1 T30 4 T41 4
all_values[17] 534 1 T4 1 T11 3 T30 2
all_values[18] 488 1 T4 1 T11 1 T30 3
all_values[19] 524 1 T30 4 T41 8 T177 4
all_values[20] 499 1 T11 3 T41 3 T177 4
all_values[21] 477 1 T11 3 T30 2 T41 3
all_values[22] 493 1 T11 6 T30 3 T41 4
all_values[23] 509 1 T4 2 T11 2 T30 1

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