Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 445 1 T15 1 T16 9 T19 6
all_values[1] 422 1 T15 4 T16 4 T18 2
all_values[2] 430 1 T1 1 T15 1 T16 1
all_values[3] 471 1 T15 4 T16 2 T18 1
all_values[4] 448 1 T16 3 T18 4 T19 1
all_values[5] 466 1 T15 1 T16 4 T18 1
all_values[6] 459 1 T15 2 T16 3 T18 2
all_values[7] 441 1 T15 2 T16 2 T18 2
all_values[8] 419 1 T15 3 T16 4 T18 2
all_values[9] 417 1 T15 1 T16 5 T18 1
all_values[10] 460 1 T16 7 T18 1 T70 1
all_values[11] 489 1 T15 3 T16 1 T19 4
all_values[12] 434 1 T15 4 T16 1 T18 1
all_values[13] 461 1 T15 2 T16 6 T18 1
all_values[14] 493 1 T14 1 T15 4 T16 6
all_values[15] 445 1 T15 1 T16 3 T18 1
all_values[16] 435 1 T1 1 T14 1 T15 1
all_values[17] 446 1 T15 1 T16 1 T19 1
all_values[18] 460 1 T14 1 T15 1 T16 7
all_values[19] 462 1 T15 4 T16 4 T18 1
all_values[20] 433 1 T16 4 T18 1 T19 5
all_values[21] 427 1 T15 1 T16 1 T18 1
all_values[22] 473 1 T16 7 T19 7 T68 2
all_values[23] 433 1 T14 1 T15 4 T16 4

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