Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	172729	1			T1	3		T2	3		T3	74
values[2]	12045	1			T3	7		T11	2		T12	7
values[3]	4902	1			T3	1		T13	155		T14	161
values[4]	2676	1			T13	92		T14	47		T168	21
values[5]	1524	1			T13	52		T168	4		T83	2
values[6]	997	1			T13	20		T168	1		T84	1
values[7]	709	1			T86	31		T231	7		T43	12
values[8]	528	1			T86	4		T231	13		T43	18
values[9]	576	1			T86	4		T231	16		T43	17
values[10]	501	1			T86	5		T231	10		T43	6
values[11]	521	1			T86	20		T231	28		T43	9
values[12]	541	1			T86	31		T231	9		T43	10
values[13]	440	1			T86	18		T231	6		T43	13
values[14]	422	1			T86	10		T231	27		T43	11
values[15]	424	1			T86	3		T231	15		T43	6
values[16]	370	1			T231	21		T43	26		T88	3
values[17]	356	1			T231	5		T43	12		T88	3
values[18]	358	1			T231	4		T43	7		T88	3
values[19]	281	1			T231	7		T43	8		T88	1
values[20]	225	1			T231	5		T43	18		T88	2
values[21]	267	1			T231	18		T43	26		T88	3
values[22]	211	1			T231	32		T43	21		T88	8
values[23]	180	1			T231	4		T43	17		T88	2
values[24]	147	1			T231	10		T43	9		T88	2
values[25]	200	1			T231	19		T43	18		T88	2
values[26]	156	1			T231	17		T43	7		T88	5
values[27]	172	1			T231	15		T43	6		T88	3
values[28]	146	1			T231	9		T43	12		T88	3
values[29]	140	1			T231	9		T43	22		T88	2
values[30]	164	1			T231	14		T43	14		T88	2
values[31]	171	1			T231	12		T43	12		T88	4
values[32]	149	1			T231	7		T43	17		T88	5
values[33]	145	1			T231	13		T43	13		T88	8
values[34]	190	1			T231	37		T43	2		T88	11
values[35]	141	1			T88	8		T90	3		T111	7
values[36]	133	1			T88	4		T90	3		T111	10
values[37]	103	1			T88	1		T90	3		T111	8
values[38]	93	1			T88	1		T90	3		T111	11
values[39]	106	1			T88	2		T90	3		T111	17
values[40]	137	1			T88	10		T90	3		T111	14
values[41]	115	1			T88	5		T90	3		T111	14
values[42]	171	1			T88	3		T90	3		T111	6
values[43]	166	1			T88	2		T90	3		T113	2
values[44]	129	1			T88	4		T90	3		T113	3
values[45]	139	1			T88	2		T90	3		T113	1
values[46]	117	1			T88	4		T90	3		T113	3
values[47]	88	1			T88	1		T90	3		T113	4
values[48]	78	1			T88	5		T90	3		T113	4
values[49]	69	1			T88	1		T90	3		T113	3
values[50]	78	1			T88	3		T90	3		T113	5
values[51]	96	1			T88	7		T90	4		T113	8
values[52]	85	1			T88	4		T90	3		T113	4
values[53]	78	1			T88	7		T90	3		T113	4
values[54]	59	1			T88	3		T90	4		T113	12
values[55]	48	1			T88	1		T90	3		T113	6
values[56]	49	1			T88	2		T90	3		T113	1
values[57]	76	1			T88	2		T90	3		T113	4
values[58]	95	1			T88	5		T90	3		T113	2
values[59]	103	1			T88	4		T90	3		T113	2
values[60]	67	1			T88	1		T90	3		T113	3
values[61]	67	1			T88	4		T90	3		T113	5
values[62]	50	1			T88	2		T90	4		T113	5
values[63]	82	1			T88	8		T90	3		T113	3
values[64]	64	1			T88	6		T90	3		T113	4
values[65]	77	1			T88	9		T90	3		T113	6
values[66]	70	1			T88	8		T90	3		T113	6
values[67]	76	1			T88	13		T90	3		T113	2
values[68]	65	1			T88	6		T90	3		T113	4
values[69]	74	1			T88	9		T90	3		T113	5
values[70]	69	1			T88	6		T90	3		T113	9
values[71]	50	1			T88	3		T90	3		T113	5
values[72]	49	1			T88	3		T90	3		T113	5
values[73]	53	1			T88	5		T90	3		T113	4
values[74]	59	1			T88	7		T90	3		T113	2
values[75]	91	1			T88	10		T90	3		T113	10
values[76]	79	1			T88	3		T90	3		T113	7
values[77]	45	1			T88	1		T90	3		T113	2
values[78]	52	1			T88	3		T90	3		T113	5
values[79]	51	1			T88	2		T90	3		T113	4
values[80]	57	1			T90	3		T113	9		T232	1
values[81]	78	1			T90	3		T113	8		T232	1
values[82]	51	1			T90	3		T113	4		T232	1
values[83]	38	1			T90	3		T113	3		T232	1
values[84]	44	1			T90	3		T113	8		T232	1
values[85]	37	1			T90	3		T113	5		T232	1
values[86]	30	1			T90	3		T113	2		T232	1
values[87]	35	1			T90	3		T113	6		T232	1
values[88]	52	1			T90	3		T113	6		T232	1
values[89]	42	1			T90	3		T113	5		T232	1
values[90]	28	1			T90	3		T113	3		T232	1
values[91]	23	1			T90	3		T113	2		T232	1
values[92]	33	1			T90	3		T113	7		T232	1
values[93]	30	1			T90	3		T113	1		T232	1
values[94]	31	1			T90	4		T113	5		T232	1
values[95]	46	1			T90	5		T113	11		T232	1
values[96]	38	1			T90	5		T113	7		T232	2
values[97]	33	1			T90	5		T113	7		T232	1
values[98]	33	1			T90	7		T113	1		T232	1
values[99]	25	1			T90	4		T113	1		T232	1
values[100]	40	1			T90	8		T113	5		T232	1
values[101]	52	1			T90	6		T113	2		T232	1
values[102]	51	1			T90	5		T113	3		T232	2
values[103]	40	1			T90	4		T113	4		T232	1
values[104]	32	1			T90	5		T113	2		T232	1
values[105]	28	1			T90	7		T113	2		T232	1
values[106]	39	1			T90	8		T113	3		T232	1
values[107]	33	1			T90	5		T113	1		T232	1
values[108]	30	1			T90	4		T113	5		T232	1
values[109]	33	1			T90	5		T113	11		T232	1
values[110]	42	1			T90	7		T113	14		T232	1
values[111]	32	1			T90	6		T113	4		T232	1
values[112]	39	1			T90	12		T113	7		T232	1
values[113]	29	1			T90	6		T113	3		T232	1
values[114]	30	1			T90	7		T113	3		T232	1
values[115]	38	1			T90	7		T113	7		T232	1
values[116]	43	1			T90	9		T113	7		T232	1
values[117]	35	1			T90	6		T113	3		T232	1
values[118]	26	1			T90	4		T113	2		T232	1
values[119]	28	1			T90	4		T113	1		T232	1
values[120]	31	1			T90	5		T113	2		T232	1
values[121]	32	1			T90	6		T113	4		T232	1
values[122]	27	1			T90	6		T113	4		T232	1
values[123]	33	1			T90	4		T113	8		T232	1
values[124]	31	1			T90	4		T113	1		T232	1
values[125]	36	1			T90	6		T113	9		T232	1
values[126]	305	1			T90	134		T113	17		T232	45
values[127]	1639	1			T90	603		T113	11		T232	175
values[128]	3344	1			T90	394		T113	9		T232	222