Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 534 1 T3 4 T9 3 T11 1
all_values[1] 540 1 T3 5 T9 4 T11 1
all_values[2] 516 1 T1 1 T3 2 T9 1
all_values[3] 511 1 T3 5 T13 1 T17 1
all_values[4] 506 1 T1 1 T3 2 T18 1
all_values[5] 493 1 T1 1 T3 2 T9 3
all_values[6] 499 1 T1 1 T3 3 T16 1
all_values[7] 502 1 T1 1 T3 5 T9 2
all_values[8] 492 1 T1 1 T3 2 T11 2
all_values[9] 495 1 T3 4 T9 2 T11 2
all_values[10] 519 1 T1 1 T3 3 T9 1
all_values[11] 487 1 T1 2 T3 7 T9 3
all_values[12] 506 1 T1 1 T3 3 T9 3
all_values[13] 493 1 T3 4 T9 2 T11 1
all_values[14] 519 1 T3 5 T17 1 T18 1
all_values[15] 519 1 T3 6 T9 3 T11 2
all_values[16] 496 1 T3 2 T11 4 T14 1
all_values[17] 522 1 T3 5 T9 4 T11 2
all_values[18] 510 1 T1 1 T3 1 T9 4
all_values[19] 490 1 T3 3 T9 1 T17 1
all_values[20] 491 1 T3 10 T9 1 T11 1
all_values[21] 504 1 T1 2 T3 6 T9 1
all_values[22] 505 1 T3 4 T9 2 T11 1
all_values[23] 480 1 T3 3 T9 4 T11 2

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