Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.edn0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	184210	1			T1	1349		T2	14		T3	75
values[2]	6583	1			T8	7		T13	1		T15	9
values[3]	2275	1			T34	17		T46	22		T4	1
values[4]	1707	1			T34	10		T46	13		T20	16
values[5]	1324	1			T34	12		T46	12		T20	13
values[6]	1077	1			T34	11		T46	14		T20	12
values[7]	928	1			T34	16		T46	16		T20	6
values[8]	678	1			T34	7		T46	15		T20	4
values[9]	562	1			T34	12		T46	10		T20	1
values[10]	540	1			T34	8		T46	4		T20	2
values[11]	523	1			T34	5		T46	12		T20	2
values[12]	447	1			T34	1		T46	3		T20	2
values[13]	376	1			T34	5		T46	7		T20	2
values[14]	306	1			T34	5		T46	16		T20	2
values[15]	373	1			T34	8		T46	32		T20	6
values[16]	394	1			T34	16		T46	54		T20	7
values[17]	365	1			T34	25		T46	51		T20	12
values[18]	387	1			T34	35		T46	73		T20	11
values[19]	347	1			T34	29		T46	67		T20	7
values[20]	400	1			T34	21		T46	40		T20	3
values[21]	301	1			T34	30		T46	18		T20	4
values[22]	257	1			T34	24		T46	11		T20	8
values[23]	238	1			T34	12		T46	9		T20	7
values[24]	185	1			T34	6		T46	2		T20	1
values[25]	196	1			T34	11		T20	1		T29	5
values[26]	236	1			T34	7		T20	2		T29	8
values[27]	227	1			T34	5		T20	6		T29	7
values[28]	215	1			T34	6		T20	4		T29	3
values[29]	176	1			T34	7		T20	4		T29	3
values[30]	127	1			T34	6		T20	1		T29	3
values[31]	122	1			T34	15		T20	2		T29	7
values[32]	110	1			T34	16		T20	2		T29	8
values[33]	82	1			T34	9		T20	2		T29	3
values[34]	83	1			T34	12		T20	4		T29	12
values[35]	72	1			T34	8		T20	6		T29	5
values[36]	81	1			T34	6		T20	6		T29	12
values[37]	69	1			T34	2		T20	6		T29	9
values[38]	70	1			T20	9		T29	7		T152	1
values[39]	68	1			T20	7		T29	10		T152	1
values[40]	76	1			T20	16		T29	6		T152	1
values[41]	67	1			T20	13		T29	6		T152	1
values[42]	85	1			T20	26		T29	4		T152	1
values[43]	80	1			T20	11		T29	7		T152	1
values[44]	73	1			T20	13		T29	7		T152	1
values[45]	83	1			T20	14		T29	2		T152	1
values[46]	71	1			T20	2		T29	5		T152	1
values[47]	63	1			T29	7		T152	1		T76	7
values[48]	55	1			T29	3		T152	1		T76	4
values[49]	59	1			T29	2		T152	1		T76	4
values[50]	59	1			T29	5		T152	1		T76	2
values[51]	60	1			T29	5		T152	1		T76	1
values[52]	69	1			T29	7		T152	1		T76	2
values[53]	65	1			T29	6		T152	1		T76	2
values[54]	56	1			T29	5		T152	1		T76	1
values[55]	59	1			T29	6		T152	1		T76	3
values[56]	64	1			T29	8		T152	1		T76	2
values[57]	60	1			T29	6		T152	1		T76	4
values[58]	63	1			T29	13		T152	1		T76	4
values[59]	61	1			T29	7		T152	1		T76	1
values[60]	53	1			T29	6		T152	1		T76	1
values[61]	58	1			T29	7		T152	1		T76	1
values[62]	66	1			T29	4		T152	1		T76	3
values[63]	57	1			T29	7		T152	1		T76	1
values[64]	58	1			T29	4		T152	1		T76	2
values[65]	59	1			T29	6		T152	1		T76	1
values[66]	63	1			T29	5		T152	1		T76	2
values[67]	55	1			T29	3		T152	1		T76	1
values[68]	70	1			T29	13		T152	1		T76	1
values[69]	67	1			T29	5		T152	1		T76	1
values[70]	64	1			T29	5		T152	1		T76	3
values[71]	70	1			T29	3		T152	1		T76	4
values[72]	70	1			T29	5		T152	1		T76	1
values[73]	58	1			T29	2		T152	1		T76	2
values[74]	62	1			T29	4		T152	1		T76	4
values[75]	71	1			T29	9		T152	1		T76	2
values[76]	70	1			T29	8		T152	1		T76	3
values[77]	75	1			T29	9		T152	1		T76	1
values[78]	74	1			T29	7		T152	1		T76	4
values[79]	68	1			T29	3		T152	1		T76	1
values[80]	61	1			T29	5		T152	1		T76	1
values[81]	75	1			T29	8		T152	1		T76	7
values[82]	91	1			T29	14		T152	1		T76	9
values[83]	83	1			T29	7		T152	1		T76	2
values[84]	75	1			T29	4		T152	1		T76	1
values[85]	73	1			T29	9		T152	1		T76	1
values[86]	78	1			T29	6		T152	1		T76	9
values[87]	88	1			T29	8		T152	1		T76	9
values[88]	74	1			T29	4		T152	1		T76	5
values[89]	86	1			T29	9		T152	1		T76	11
values[90]	96	1			T29	5		T152	1		T76	12
values[91]	71	1			T29	8		T152	1		T76	3
values[92]	87	1			T29	13		T152	1		T76	3
values[93]	97	1			T29	6		T152	2		T76	4
values[94]	84	1			T29	2		T152	4		T76	6
values[95]	97	1			T29	11		T152	6		T76	2
values[96]	74	1			T29	3		T152	1		T76	2
values[97]	79	1			T29	8		T152	1		T76	4
values[98]	97	1			T29	4		T152	1		T76	6
values[99]	88	1			T29	8		T152	1		T76	7
values[100]	93	1			T29	10		T152	4		T76	2
values[101]	80	1			T29	6		T152	3		T76	1
values[102]	98	1			T29	4		T152	4		T76	4
values[103]	95	1			T29	7		T152	5		T76	3
values[104]	84	1			T29	10		T152	1		T76	4
values[105]	97	1			T29	7		T152	1		T76	11
values[106]	100	1			T29	6		T152	1		T76	2
values[107]	97	1			T29	8		T152	2		T76	2
values[108]	111	1			T29	5		T152	1		T76	5
values[109]	88	1			T29	5		T152	1		T76	4
values[110]	99	1			T29	7		T152	1		T76	6
values[111]	95	1			T29	8		T152	1		T76	2
values[112]	105	1			T29	9		T152	1		T76	1
values[113]	94	1			T29	13		T152	1		T76	5
values[114]	92	1			T29	14		T152	1		T76	5
values[115]	122	1			T29	7		T152	3		T76	6
values[116]	129	1			T29	9		T152	3		T76	5
values[117]	118	1			T29	11		T152	3		T76	8
values[118]	103	1			T29	11		T152	2		T76	3
values[119]	96	1			T29	8		T152	2		T76	6
values[120]	109	1			T29	13		T152	5		T76	6
values[121]	132	1			T29	14		T152	2		T76	2
values[122]	129	1			T29	7		T152	1		T76	3
values[123]	144	1			T29	15		T152	2		T76	3
values[124]	177	1			T29	35		T152	1		T76	12
values[125]	344	1			T29	43		T152	6		T76	27
values[126]	763	1			T29	64		T152	11		T76	37
values[127]	3528	1			T29	36		T152	83		T76	23
values[128]	6637	1			T29	2		T152	201		T76	3

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	163155	1			T1	232		T2	14		T3	80
values[2]	5937	1			T3	1		T8	3		T9	2
values[3]	2122	1			T34	60		T17	12		T4	2
values[4]	1594	1			T34	55		T17	4		T87	1
values[5]	1346	1			T34	34		T17	13		T87	1
values[6]	1182	1			T34	40		T17	14		T87	1
values[7]	1074	1			T34	14		T17	8		T87	1
values[8]	981	1			T34	17		T17	14		T87	1
values[9]	911	1			T34	45		T17	16		T87	1
values[10]	799	1			T34	21		T17	19		T87	1
values[11]	627	1			T34	6		T17	28		T87	1
values[12]	639	1			T17	19		T87	1		T73	13
values[13]	619	1			T17	10		T87	1		T73	22
values[14]	624	1			T17	12		T87	1		T73	22
values[15]	582	1			T17	4		T87	1		T73	22
values[16]	462	1			T17	4		T87	1		T73	15
values[17]	360	1			T17	5		T87	1		T73	15
values[18]	328	1			T17	5		T87	1		T73	20
values[19]	272	1			T17	1		T87	1		T73	9
values[20]	245	1			T17	1		T87	1		T73	7
values[21]	227	1			T87	1		T73	8		T185	7
values[22]	246	1			T87	1		T73	18		T185	5
values[23]	220	1			T87	1		T73	6		T185	7
values[24]	225	1			T87	1		T73	13		T185	6
values[25]	233	1			T87	1		T73	13		T185	4
values[26]	223	1			T87	1		T73	13		T185	10
values[27]	225	1			T87	1		T73	2		T185	6
values[28]	219	1			T87	1		T185	7		T74	4
values[29]	228	1			T87	1		T185	12		T74	3
values[30]	230	1			T87	1		T185	7		T74	5
values[31]	172	1			T87	1		T185	3		T74	3
values[32]	169	1			T87	2		T185	13		T76	17
values[33]	175	1			T87	2		T185	18		T76	12
values[34]	182	1			T87	1		T185	11		T76	22
values[35]	176	1			T87	1		T185	6		T76	35
values[36]	184	1			T87	1		T185	6		T76	38
values[37]	155	1			T87	1		T185	10		T76	34
values[38]	156	1			T87	1		T185	23		T76	26
values[39]	136	1			T87	1		T185	17		T76	14
values[40]	130	1			T87	1		T185	6		T76	4
values[41]	161	1			T87	1		T185	6		T76	2
values[42]	115	1			T87	1		T185	3		T30	12
values[43]	113	1			T87	1		T185	4		T30	10
values[44]	99	1			T87	1		T185	1		T30	5
values[45]	110	1			T87	1		T185	5		T30	3
values[46]	83	1			T87	1		T185	2		T30	8
values[47]	53	1			T87	1		T185	2		T30	4
values[48]	51	1			T87	1		T185	2		T30	6
values[49]	48	1			T87	1		T185	1		T30	6
values[50]	49	1			T87	1		T185	3		T30	7
values[51]	37	1			T87	1		T185	2		T30	2
values[52]	50	1			T87	1		T185	1		T30	7
values[53]	57	1			T87	1		T185	2		T30	6
values[54]	53	1			T87	1		T185	3		T30	12
values[55]	59	1			T87	1		T185	4		T30	8
values[56]	51	1			T87	1		T185	2		T30	4
values[57]	46	1			T87	1		T185	1		T30	5
values[58]	43	1			T87	1		T185	1		T30	3
values[59]	57	1			T87	1		T185	2		T30	5
values[60]	56	1			T87	1		T185	1		T30	6
values[61]	45	1			T87	1		T185	3		T30	5
values[62]	41	1			T87	1		T185	1		T30	5
values[63]	55	1			T87	1		T185	2		T30	12
values[64]	62	1			T87	1		T185	2		T30	11
values[65]	57	1			T87	1		T185	1		T30	9
values[66]	58	1			T87	1		T185	2		T30	4
values[67]	50	1			T87	1		T185	4		T30	6
values[68]	73	1			T87	1		T185	7		T30	8
values[69]	60	1			T87	1		T185	2		T30	9
values[70]	56	1			T87	1		T185	2		T30	4
values[71]	52	1			T87	1		T185	2		T30	3
values[72]	76	1			T87	1		T185	2		T30	6
values[73]	53	1			T87	1		T185	2		T30	4
values[74]	60	1			T87	1		T185	1		T30	4
values[75]	65	1			T87	1		T185	2		T30	4
values[76]	65	1			T87	1		T185	3		T30	4
values[77]	60	1			T87	1		T185	2		T30	4
values[78]	66	1			T87	1		T185	3		T30	2
values[79]	73	1			T87	1		T185	4		T30	3
values[80]	70	1			T87	1		T185	3		T30	4
values[81]	57	1			T87	1		T185	1		T30	7
values[82]	80	1			T87	1		T185	2		T30	3
values[83]	70	1			T87	1		T185	5		T30	6
values[84]	76	1			T87	1		T185	2		T30	2
values[85]	72	1			T87	1		T185	1		T30	4
values[86]	54	1			T87	1		T185	2		T30	3
values[87]	80	1			T87	1		T185	4		T30	4
values[88]	88	1			T87	1		T185	4		T30	3
values[89]	74	1			T87	1		T185	3		T30	7
values[90]	79	1			T87	1		T185	1		T30	13
values[91]	82	1			T87	1		T185	4		T30	7
values[92]	63	1			T87	1		T185	2		T30	7
values[93]	90	1			T87	1		T185	6		T30	7
values[94]	76	1			T87	1		T185	3		T30	13
values[95]	75	1			T87	1		T185	4		T30	5
values[96]	66	1			T87	1		T185	2		T30	4
values[97]	70	1			T87	1		T185	5		T30	4
values[98]	74	1			T87	1		T185	3		T30	5
values[99]	64	1			T87	1		T185	1		T30	5
values[100]	84	1			T87	1		T185	3		T30	10
values[101]	64	1			T87	1		T185	3		T30	9
values[102]	92	1			T87	1		T185	4		T30	15
values[103]	93	1			T87	1		T185	3		T30	19
values[104]	90	1			T87	1		T185	8		T30	5
values[105]	83	1			T87	1		T185	7		T30	5
values[106]	75	1			T87	1		T185	4		T30	10
values[107]	73	1			T87	1		T185	2		T30	5
values[108]	67	1			T87	1		T185	2		T30	6
values[109]	83	1			T87	1		T185	5		T30	10
values[110]	89	1			T87	1		T185	6		T30	12
values[111]	76	1			T87	1		T185	3		T30	7
values[112]	74	1			T87	1		T185	7		T30	8
values[113]	79	1			T87	1		T185	2		T30	12
values[114]	75	1			T87	1		T185	3		T30	4
values[115]	78	1			T87	1		T185	6		T30	6
values[116]	96	1			T87	1		T185	4		T30	8
values[117]	109	1			T87	1		T185	12		T30	11
values[118]	98	1			T87	1		T185	5		T30	16
values[119]	106	1			T87	3		T185	11		T30	18
values[120]	104	1			T87	4		T185	9		T30	19
values[121]	89	1			T87	2		T185	9		T30	7
values[122]	89	1			T87	2		T185	11		T30	8
values[123]	114	1			T87	1		T185	8		T30	12
values[124]	204	1			T87	1		T185	11		T30	21
values[125]	390	1			T87	1		T185	24		T30	64
values[126]	622	1			T87	10		T185	16		T30	79
values[127]	1849	1			T87	124		T185	6		T30	44
values[128]	3192	1			T87	298		T185	1		T30	3

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	174147	1			T1	755		T2	6		T3	77
values[2]	6819	1			T3	3		T8	4		T9	1
values[3]	2714	1			T34	130		T17	32		T49	1
values[4]	1890	1			T34	66		T17	27		T4	1
values[5]	1481	1			T34	22		T17	36		T20	2
values[6]	1102	1			T34	13		T17	34		T20	1
values[7]	848	1			T34	17		T17	28		T20	3
values[8]	740	1			T34	15		T17	17		T20	1
values[9]	700	1			T17	29		T20	3		T185	29
values[10]	712	1			T17	40		T20	2		T185	26
values[11]	681	1			T17	30		T20	4		T185	16
values[12]	529	1			T17	40		T20	3		T185	6
values[13]	357	1			T17	36		T20	1		T29	3
values[14]	290	1			T17	14		T20	1		T29	3
values[15]	312	1			T17	16		T20	2		T29	1
values[16]	281	1			T17	9		T20	4		T29	1
values[17]	215	1			T17	3		T20	3		T29	1
values[18]	234	1			T17	8		T20	3		T29	2
values[19]	211	1			T17	9		T20	3		T29	2
values[20]	211	1			T17	3		T20	5		T29	1
values[21]	204	1			T20	3		T29	1		T112	1
values[22]	178	1			T20	3		T29	3		T112	1
values[23]	192	1			T20	5		T29	1		T112	1
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