Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	165287	1			T1	226		T2	8		T3	71
values[2]	10365	1			T2	1		T3	2		T7	38
values[3]	3602	1			T7	18		T43	1		T34	34
values[4]	1967	1			T7	26		T34	19		T21	1
values[5]	1332	1			T7	26		T34	4		T21	1
values[6]	949	1			T7	12		T21	1		T157	10
values[7]	627	1			T7	42		T21	1		T157	8
values[8]	512	1			T7	62		T21	1		T157	10
values[9]	401	1			T7	44		T21	1		T157	6
values[10]	384	1			T7	49		T21	1		T157	3
values[11]	380	1			T7	21		T21	1		T157	8
values[12]	420	1			T7	10		T21	1		T157	14
values[13]	349	1			T7	3		T21	1		T157	5
values[14]	264	1			T7	3		T21	1		T157	5
values[15]	242	1			T7	5		T21	1		T157	9
values[16]	256	1			T7	8		T21	1		T157	7
values[17]	328	1			T7	21		T21	1		T157	10
values[18]	325	1			T7	12		T21	1		T157	4
values[19]	296	1			T7	6		T21	1		T157	23
values[20]	244	1			T7	3		T21	1		T157	9
values[21]	270	1			T21	1		T157	8		T152	1
values[22]	253	1			T21	1		T157	6		T152	1
values[23]	252	1			T21	1		T157	7		T152	1
values[24]	269	1			T21	1		T157	7		T152	1
values[25]	268	1			T21	1		T157	9		T152	1
values[26]	308	1			T21	1		T157	6		T152	1
values[27]	281	1			T21	1		T157	16		T152	1
values[28]	318	1			T21	1		T157	13		T152	1
values[29]	304	1			T21	1		T157	6		T152	1
values[30]	292	1			T21	1		T157	6		T152	1
values[31]	291	1			T21	1		T157	8		T152	1
values[32]	317	1			T21	1		T157	6		T152	1
values[33]	250	1			T21	1		T157	13		T152	1
values[34]	283	1			T21	1		T157	8		T152	1
values[35]	232	1			T21	1		T157	18		T152	1
values[36]	222	1			T21	1		T157	14		T152	1
values[37]	198	1			T21	1		T157	9		T152	1
values[38]	214	1			T21	1		T157	6		T152	1
values[39]	166	1			T21	1		T157	9		T152	1
values[40]	149	1			T21	1		T157	3		T152	1
values[41]	165	1			T21	1		T157	7		T152	1
values[42]	184	1			T21	1		T157	6		T152	1
values[43]	188	1			T21	1		T157	4		T152	1
values[44]	205	1			T21	1		T157	14		T152	1
values[45]	199	1			T21	1		T157	4		T152	1
values[46]	209	1			T21	1		T157	8		T152	1
values[47]	178	1			T21	1		T157	11		T152	1
values[48]	194	1			T21	1		T157	17		T152	1
values[49]	190	1			T21	2		T157	17		T152	1
values[50]	149	1			T21	1		T157	12		T152	1
values[51]	163	1			T21	1		T157	4		T152	1
values[52]	164	1			T21	1		T157	4		T152	1
values[53]	185	1			T21	1		T157	8		T152	1
values[54]	176	1			T21	1		T157	5		T152	1
values[55]	188	1			T21	1		T157	6		T152	1
values[56]	163	1			T21	1		T157	8		T152	1
values[57]	184	1			T21	1		T157	6		T152	1
values[58]	176	1			T21	1		T157	5		T152	1
values[59]	175	1			T21	1		T157	11		T152	1
values[60]	141	1			T21	1		T157	9		T152	1
values[61]	162	1			T21	1		T157	11		T152	1
values[62]	184	1			T21	1		T157	9		T152	1
values[63]	186	1			T21	1		T157	6		T152	1
values[64]	228	1			T21	1		T157	9		T152	1
values[65]	158	1			T21	1		T152	1		T76	9
values[66]	125	1			T21	1		T152	1		T76	9
values[67]	123	1			T21	1		T152	1		T76	14
values[68]	125	1			T21	1		T152	1		T76	13
values[69]	108	1			T21	1		T152	1		T76	13
values[70]	82	1			T21	1		T152	1		T76	7
values[71]	84	1			T21	1		T152	2		T76	6
values[72]	81	1			T21	1		T152	1		T76	15
values[73]	73	1			T21	1		T152	1		T76	8
values[74]	93	1			T21	1		T152	1		T76	14
values[75]	92	1			T21	1		T152	1		T76	12
values[76]	87	1			T21	1		T152	1		T76	8
values[77]	117	1			T21	1		T152	1		T76	18
values[78]	99	1			T21	1		T152	1		T76	17
values[79]	111	1			T21	1		T152	1		T76	15
values[80]	107	1			T21	1		T152	1		T76	11
values[81]	98	1			T21	1		T152	1		T76	12
values[82]	85	1			T21	1		T152	1		T76	11
values[83]	78	1			T21	1		T152	1		T76	9
values[84]	82	1			T21	1		T152	1		T76	9
values[85]	72	1			T21	1		T152	1		T76	6
values[86]	67	1			T21	1		T152	1		T76	5
values[87]	62	1			T21	1		T152	1		T76	9
values[88]	73	1			T21	1		T152	1		T76	21
values[89]	80	1			T21	1		T152	1		T76	23
values[90]	84	1			T21	1		T152	1		T76	17
values[91]	102	1			T21	1		T152	1		T76	14
values[92]	79	1			T21	1		T152	1		T76	10
values[93]	86	1			T21	1		T152	2		T76	13
values[94]	91	1			T21	1		T152	9		T76	24
values[95]	82	1			T21	1		T152	5		T76	12
values[96]	93	1			T21	1		T152	1		T76	18
values[97]	87	1			T21	1		T152	1		T76	21
values[98]	86	1			T21	1		T152	1		T76	19
values[99]	93	1			T21	1		T152	5		T76	18
values[100]	95	1			T21	1		T152	4		T76	16
values[101]	64	1			T21	1		T152	2		T76	9
values[102]	70	1			T21	1		T152	1		T76	10
values[103]	73	1			T21	1		T152	1		T76	9
values[104]	77	1			T21	1		T152	2		T76	8
values[105]	86	1			T21	1		T152	2		T76	5
values[106]	87	1			T21	1		T152	1		T76	9
values[107]	82	1			T21	2		T152	1		T76	11
values[108]	77	1			T21	1		T152	2		T76	6
values[109]	62	1			T21	1		T152	1		T76	4
values[110]	65	1			T21	2		T152	1		T76	8
values[111]	65	1			T21	4		T152	2		T76	9
values[112]	84	1			T21	7		T152	3		T76	9
values[113]	78	1			T21	2		T152	1		T76	11
values[114]	85	1			T21	2		T152	1		T76	19
values[115]	99	1			T21	5		T152	6		T76	16
values[116]	75	1			T21	1		T152	7		T76	8
values[117]	81	1			T21	2		T152	3		T76	12
values[118]	61	1			T21	3		T152	1		T76	16
values[119]	99	1			T21	4		T152	4		T76	12
values[120]	79	1			T21	1		T152	1		T76	26
values[121]	85	1			T21	1		T152	1		T76	19
values[122]	67	1			T21	2		T152	2		T76	6
values[123]	68	1			T21	2		T152	1		T76	12
values[124]	91	1			T21	3		T152	2		T76	28
values[125]	103	1			T21	2		T152	4		T76	34
values[126]	812	1			T21	23		T152	6		T76	44
values[127]	3504	1			T21	139		T152	82		T76	7
values[128]	4722	1			T21	173		T152	256		T112	135