Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	167803	1			T1	95		T2	7		T3	384
values[2]	6178	1			T3	4		T7	5		T8	13
values[3]	2115	1			T28	1		T74	1		T75	8
values[4]	1408	1			T75	6		T156	1		T214	8
values[5]	1045	1			T75	5		T156	1		T214	4
values[6]	908	1			T75	7		T156	1		T214	3
values[7]	729	1			T75	3		T156	1		T214	3
values[8]	614	1			T75	6		T156	1		T214	3
values[9]	510	1			T75	9		T156	1		T214	1
values[10]	529	1			T75	14		T156	1		T214	4
values[11]	479	1			T75	20		T156	1		T214	4
values[12]	421	1			T75	9		T156	1		T214	1
values[13]	422	1			T75	13		T156	1		T85	1
values[14]	464	1			T75	19		T156	1		T85	2
values[15]	453	1			T75	13		T156	1		T85	2
values[16]	458	1			T75	13		T156	1		T85	2
values[17]	447	1			T75	5		T156	1		T85	2
values[18]	395	1			T75	4		T156	1		T85	2
values[19]	421	1			T75	2		T156	1		T85	2
values[20]	335	1			T75	16		T156	1		T85	1
values[21]	333	1			T75	19		T156	1		T85	4
values[22]	301	1			T75	12		T156	2		T85	1
values[23]	247	1			T75	10		T156	1		T85	2
values[24]	233	1			T75	1		T156	1		T85	2
values[25]	204	1			T75	2		T156	1		T85	1
values[26]	231	1			T75	5		T156	1		T85	2
values[27]	197	1			T75	2		T156	1		T85	3
values[28]	187	1			T75	3		T156	1		T85	8
values[29]	192	1			T75	3		T156	1		T85	1
values[30]	221	1			T75	4		T156	1		T85	1
values[31]	177	1			T75	1		T156	1		T85	2
values[32]	134	1			T75	4		T156	1		T85	2
values[33]	117	1			T75	2		T156	1		T85	2
values[34]	99	1			T75	5		T156	1		T85	4
values[35]	73	1			T75	2		T156	1		T85	1
values[36]	68	1			T75	6		T156	1		T85	1
values[37]	75	1			T75	5		T156	2		T85	6
values[38]	87	1			T75	18		T156	1		T85	1
values[39]	87	1			T75	23		T156	1		T85	1
values[40]	98	1			T75	33		T156	1		T85	2
values[41]	103	1			T75	35		T156	1		T85	1
values[42]	90	1			T75	14		T156	1		T85	3
values[43]	91	1			T75	20		T156	1		T85	2
values[44]	87	1			T75	8		T156	1		T85	4
values[45]	77	1			T75	6		T156	1		T85	1
values[46]	85	1			T156	1		T85	1		T100	10
values[47]	86	1			T156	1		T85	2		T100	5
values[48]	86	1			T156	1		T85	1		T100	4
values[49]	82	1			T156	1		T85	1		T100	3
values[50]	77	1			T156	1		T85	3		T100	4
values[51]	71	1			T156	1		T85	3		T100	5
values[52]	70	1			T156	1		T85	4		T100	2
values[53]	83	1			T156	1		T85	4		T100	5
values[54]	104	1			T156	1		T85	2		T100	5
values[55]	97	1			T156	1		T85	4		T100	4
values[56]	80	1			T156	1		T85	1		T100	2
values[57]	71	1			T156	1		T85	2		T100	1
values[58]	74	1			T156	1		T85	3		T100	4
values[59]	54	1			T156	1		T85	1		T100	3
values[60]	52	1			T156	1		T85	3		T100	1
values[61]	60	1			T156	1		T85	4		T100	4
values[62]	56	1			T156	1		T85	7		T100	1
values[63]	54	1			T156	1		T85	2		T100	1
values[64]	53	1			T156	1		T85	3		T100	1
values[65]	61	1			T156	1		T85	1		T100	1
values[66]	77	1			T156	1		T85	4		T100	2
values[67]	66	1			T156	1		T85	4		T100	5
values[68]	69	1			T156	1		T85	1		T100	4
values[69]	64	1			T156	1		T85	2		T100	2
values[70]	73	1			T156	1		T85	3		T100	1
values[71]	72	1			T156	1		T85	1		T100	2
values[72]	71	1			T156	1		T85	10		T100	3
values[73]	67	1			T156	1		T85	4		T100	9
values[74]	83	1			T156	1		T85	5		T100	5
values[75]	68	1			T156	1		T85	1		T100	3
values[76]	82	1			T156	1		T85	2		T100	2
values[77]	72	1			T156	1		T85	2		T100	2
values[78]	73	1			T156	1		T85	1		T100	1
values[79]	68	1			T156	1		T85	1		T100	1
values[80]	86	1			T156	1		T85	3		T100	5
values[81]	73	1			T156	1		T85	2		T100	3
values[82]	72	1			T156	1		T85	2		T100	2
values[83]	60	1			T156	2		T85	3		T100	1
values[84]	73	1			T156	3		T85	3		T100	2
values[85]	65	1			T156	2		T85	1		T100	3
values[86]	69	1			T156	2		T85	1		T100	2
values[87]	75	1			T156	6		T85	2		T100	1
values[88]	70	1			T156	3		T85	3		T100	5
values[89]	68	1			T156	3		T85	1		T100	3
values[90]	78	1			T156	1		T85	1		T100	1
values[91]	90	1			T156	2		T85	5		T100	2
values[92]	78	1			T156	2		T85	4		T100	1
values[93]	88	1			T156	2		T85	4		T100	1
values[94]	82	1			T156	1		T85	3		T100	2
values[95]	88	1			T156	2		T85	2		T100	2
values[96]	91	1			T156	4		T85	4		T100	2
values[97]	84	1			T156	2		T85	2		T100	2
values[98]	79	1			T156	2		T85	4		T100	1
values[99]	78	1			T156	4		T85	3		T100	2
values[100]	105	1			T156	3		T85	6		T100	1
values[101]	107	1			T156	3		T85	6		T100	4
values[102]	81	1			T156	2		T85	1		T100	3
values[103]	81	1			T156	2		T85	3		T100	1
values[104]	93	1			T156	1		T85	2		T100	2
values[105]	100	1			T156	1		T85	4		T100	1
values[106]	91	1			T156	1		T85	2		T100	1
values[107]	108	1			T156	1		T85	2		T100	2
values[108]	68	1			T156	2		T85	5		T100	4
values[109]	75	1			T156	5		T85	2		T100	3
values[110]	92	1			T156	5		T85	3		T100	3
values[111]	91	1			T156	1		T85	3		T100	2
values[112]	89	1			T156	2		T85	2		T100	8
values[113]	98	1			T156	1		T85	3		T100	6
values[114]	87	1			T156	1		T85	5		T100	6
values[115]	101	1			T156	2		T85	5		T100	10
values[116]	108	1			T156	1		T85	1		T100	10
values[117]	118	1			T156	2		T85	1		T100	15
values[118]	101	1			T156	3		T85	2		T100	5
values[119]	97	1			T156	1		T85	3		T100	5
values[120]	97	1			T156	2		T85	1		T100	3
values[121]	98	1			T156	2		T85	4		T100	3
values[122]	112	1			T156	1		T85	2		T100	5
values[123]	137	1			T156	1		T85	5		T100	9
values[124]	163	1			T156	1		T85	21		T100	9
values[125]	361	1			T156	2		T85	46		T100	13
values[126]	847	1			T156	21		T85	52		T100	16
values[127]	3437	1			T156	84		T85	25		T100	4
values[128]	6233	1			T156	155		T235	266		T157	149