Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 538 1 T7 1 T11 2 T14 3
all_values[1] 511 1 T7 2 T11 4 T14 7
all_values[2] 540 1 T7 2 T11 2 T14 6
all_values[3] 526 1 T7 1 T11 4 T14 4
all_values[4] 506 1 T11 3 T14 2 T16 2
all_values[5] 527 1 T11 2 T14 5 T16 5
all_values[6] 525 1 T7 3 T11 3 T14 1
all_values[7] 470 1 T7 1 T11 3 T14 5
all_values[8] 544 1 T7 2 T11 1 T14 3
all_values[9] 496 1 T7 2 T11 2 T14 2
all_values[10] 505 1 T7 2 T11 3 T14 5
all_values[11] 490 1 T11 3 T14 2 T16 7
all_values[12] 481 1 T7 1 T11 4 T14 2
all_values[13] 467 1 T11 1 T14 2 T16 9
all_values[14] 494 1 T7 3 T11 3 T14 5
all_values[15] 495 1 T7 1 T11 4 T14 3
all_values[16] 485 1 T7 1 T11 1 T14 1
all_values[17] 501 1 T7 3 T11 2 T14 5
all_values[18] 479 1 T7 2 T14 5 T16 8
all_values[19] 498 1 T7 1 T11 1 T14 4
all_values[20] 475 1 T7 1 T14 2 T16 4
all_values[21] 484 1 T7 1 T11 4 T14 3
all_values[22] 477 1 T7 1 T11 2 T14 1
all_values[23] 529 1 T7 2 T16 12 T21 1

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