Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_main__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	206512	1			T1	1		T2	152		T3	18
values[2]	7925	1			T1	1		T2	18		T7	2
values[3]	2989	1			T1	1		T2	2		T8	1
values[4]	2177	1			T1	1		T15	1		T45	1
values[5]	1774	1			T1	1		T15	1		T76	71
values[6]	1459	1			T1	1		T15	1		T76	87
values[7]	1143	1			T1	1		T15	1		T76	70
values[8]	997	1			T1	1		T15	1		T76	69
values[9]	938	1			T1	1		T15	2		T76	63
values[10]	769	1			T1	1		T15	1		T76	58
values[11]	605	1			T1	1		T15	1		T76	29
values[12]	495	1			T1	1		T15	1		T76	42
values[13]	445	1			T1	1		T15	1		T76	37
values[14]	419	1			T1	1		T15	1		T76	48
values[15]	405	1			T1	1		T15	1		T76	53
values[16]	453	1			T1	1		T15	1		T76	74
values[17]	374	1			T1	1		T15	1		T76	39
values[18]	352	1			T1	1		T15	1		T76	41
values[19]	261	1			T1	1		T15	1		T76	21
values[20]	219	1			T1	1		T15	1		T76	13
values[21]	167	1			T1	1		T15	1		T76	6
values[22]	247	1			T1	1		T15	1		T76	6
values[23]	215	1			T1	1		T15	1		T77	1
values[24]	187	1			T1	1		T15	1		T77	1
values[25]	150	1			T1	1		T15	1		T77	1
values[26]	131	1			T1	1		T15	1		T77	1
values[27]	109	1			T1	1		T15	1		T77	1
values[28]	133	1			T1	1		T15	1		T77	1
values[29]	113	1			T1	1		T15	1		T77	1
values[30]	110	1			T1	1		T15	1		T77	1
values[31]	84	1			T1	2		T15	1		T77	1
values[32]	81	1			T1	1		T15	1		T77	1
values[33]	73	1			T1	1		T15	1		T77	1
values[34]	70	1			T1	1		T15	1		T77	1
values[35]	55	1			T1	1		T15	1		T77	1
values[36]	53	1			T1	1		T15	1		T77	1
values[37]	50	1			T1	1		T15	1		T77	1
values[38]	54	1			T1	1		T15	1		T77	1
values[39]	46	1			T1	1		T15	1		T77	1
values[40]	50	1			T1	1		T15	1		T77	1
values[41]	48	1			T1	1		T15	1		T77	1
values[42]	49	1			T1	1		T15	1		T77	1
values[43]	48	1			T1	1		T15	1		T77	1
values[44]	45	1			T1	1		T15	1		T77	1
values[45]	46	1			T1	1		T15	1		T77	1
values[46]	56	1			T1	1		T15	1		T77	1
values[47]	58	1			T1	1		T15	1		T77	1
values[48]	67	1			T1	1		T15	1		T77	1
values[49]	77	1			T1	1		T15	1		T77	1
values[50]	96	1			T1	1		T15	1		T77	1
values[51]	68	1			T1	1		T15	1		T77	1
values[52]	63	1			T1	1		T15	1		T77	1
values[53]	49	1			T1	1		T15	1		T77	1
values[54]	45	1			T1	1		T15	1		T77	1
values[55]	38	1			T1	1		T15	1		T77	1
values[56]	43	1			T1	1		T15	1		T77	1
values[57]	48	1			T1	1		T15	1		T77	1
values[58]	37	1			T1	1		T15	1		T77	1
values[59]	41	1			T1	1		T15	1		T77	1
values[60]	44	1			T1	1		T15	1		T77	1
values[61]	47	1			T1	1		T15	1		T77	1
values[62]	45	1			T1	1		T15	1		T77	1
values[63]	46	1			T1	1		T15	1		T77	1
values[64]	45	1			T1	1		T15	1		T77	1
values[65]	44	1			T1	1		T15	1		T77	1
values[66]	41	1			T1	1		T15	1		T77	1
values[67]	48	1			T1	1		T15	1		T77	1
values[68]	52	1			T1	1		T15	1		T77	1
values[69]	63	1			T1	1		T15	1		T77	1
values[70]	47	1			T1	1		T15	2		T77	1
values[71]	46	1			T1	1		T15	1		T77	1
values[72]	42	1			T1	1		T15	1		T77	1
values[73]	40	1			T1	1		T15	1		T77	1
values[74]	41	1			T1	1		T15	1		T77	1
values[75]	44	1			T1	1		T15	1		T77	1
values[76]	37	1			T1	1		T15	1		T77	1
values[77]	43	1			T1	1		T15	1		T77	1
values[78]	54	1			T1	1		T15	1		T77	1
values[79]	53	1			T1	1		T15	1		T77	1
values[80]	51	1			T1	1		T15	1		T77	1
values[81]	59	1			T1	1		T15	1		T77	1
values[82]	45	1			T1	1		T15	1		T77	1
values[83]	62	1			T1	1		T15	1		T77	1
values[84]	52	1			T1	1		T15	1		T77	1
values[85]	54	1			T1	1		T15	1		T77	1
values[86]	62	1			T1	1		T15	1		T77	1
values[87]	59	1			T1	1		T15	1		T77	1
values[88]	58	1			T1	1		T15	1		T77	1
values[89]	59	1			T1	1		T15	1		T77	6
values[90]	68	1			T1	1		T15	1		T77	5
values[91]	55	1			T1	1		T15	1		T77	4
values[92]	58	1			T1	1		T15	1		T77	5
values[93]	53	1			T1	1		T15	1		T77	5
values[94]	58	1			T1	1		T15	1		T77	2
values[95]	59	1			T1	1		T15	1		T77	7
values[96]	60	1			T1	1		T15	1		T77	4
values[97]	60	1			T1	1		T15	1		T77	1
values[98]	68	1			T1	3		T15	1		T77	2
values[99]	82	1			T1	1		T15	1		T77	3
values[100]	81	1			T1	2		T15	1		T77	2
values[101]	58	1			T1	3		T15	1		T77	2
values[102]	56	1			T1	2		T15	1		T77	2
values[103]	60	1			T1	3		T15	1		T77	1
values[104]	61	1			T1	3		T15	1		T77	3
values[105]	71	1			T1	4		T15	1		T77	2
values[106]	80	1			T1	2		T15	1		T77	2
values[107]	97	1			T1	4		T15	1		T77	2
values[108]	76	1			T1	1		T15	1		T77	4
values[109]	82	1			T1	1		T15	1		T77	4
values[110]	89	1			T1	1		T15	1		T77	2
values[111]	92	1			T1	1		T15	1		T77	4
values[112]	81	1			T1	1		T15	1		T77	2
values[113]	97	1			T1	3		T15	1		T77	2
values[114]	77	1			T1	2		T15	1		T77	2
values[115]	115	1			T1	8		T15	1		T77	6
values[116]	102	1			T1	5		T15	1		T77	7
values[117]	79	1			T1	1		T15	1		T77	3
values[118]	78	1			T1	2		T15	1		T77	2
values[119]	80	1			T1	2		T15	1		T77	4
values[120]	97	1			T1	3		T15	1		T77	1
values[121]	93	1			T1	2		T15	2		T77	4
values[122]	90	1			T1	1		T15	4		T77	3
values[123]	106	1			T1	1		T15	1		T77	1
values[124]	144	1			T1	1		T15	1		T77	1
values[125]	310	1			T1	1		T15	1		T77	2
values[126]	565	1			T1	13		T15	10		T77	15
values[127]	2215	1			T1	123		T15	131		T77	115
values[128]	3384	1			T1	246		T15	203		T77	167