Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__core_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	211260	1			T2	143		T3	7		T7	19
values[2]	7498	1			T2	21		T7	2		T8	11
values[3]	2797	1			T2	3		T13	1		T45	2
values[4]	1889	1			T45	1		T48	1		T22	2
values[5]	1485	1			T22	2		T77	1		T32	54
values[6]	1408	1			T22	2		T77	1		T32	24
values[7]	1183	1			T22	2		T77	1		T32	17
values[8]	993	1			T22	2		T77	1		T32	3
values[9]	925	1			T22	2		T77	1		T78	11
values[10]	779	1			T22	2		T77	1		T78	7
values[11]	729	1			T22	2		T77	1		T78	3
values[12]	694	1			T22	2		T77	1		T78	4
values[13]	707	1			T22	2		T77	1		T78	1
values[14]	728	1			T22	2		T77	1		T78	2
values[15]	602	1			T22	2		T77	1		T78	2
values[16]	571	1			T22	2		T77	1		T78	1
values[17]	557	1			T22	2		T77	1		T78	5
values[18]	471	1			T22	2		T77	1		T78	4
values[19]	321	1			T22	2		T77	1		T78	2
values[20]	256	1			T22	2		T77	1		T78	2
values[21]	196	1			T22	2		T77	1		T78	3
values[22]	210	1			T22	2		T77	1		T78	2
values[23]	229	1			T22	2		T77	1		T78	1
values[24]	243	1			T22	2		T77	1		T78	3
values[25]	232	1			T22	2		T77	1		T78	2
values[26]	216	1			T22	2		T77	1		T78	3
values[27]	193	1			T22	2		T77	1		T78	2
values[28]	157	1			T22	2		T77	1		T78	3
values[29]	144	1			T22	2		T77	1		T78	2
values[30]	117	1			T22	2		T77	1		T78	1
values[31]	113	1			T22	2		T77	1		T78	4
values[32]	116	1			T22	2		T77	1		T78	3
values[33]	112	1			T22	2		T77	1		T78	3
values[34]	103	1			T22	2		T77	1		T78	2
values[35]	91	1			T22	2		T77	1		T78	2
values[36]	110	1			T22	2		T77	1		T78	2
values[37]	133	1			T22	2		T77	1		T78	9
values[38]	117	1			T22	2		T77	1		T78	4
values[39]	125	1			T22	2		T77	1		T78	3
values[40]	98	1			T22	2		T77	1		T78	8
values[41]	95	1			T22	2		T77	1		T78	8
values[42]	74	1			T22	2		T77	1		T78	1
values[43]	71	1			T22	2		T77	1		T78	3
values[44]	60	1			T22	2		T77	1		T78	3
values[45]	78	1			T22	2		T77	1		T78	1
values[46]	76	1			T22	2		T77	1		T78	6
values[47]	55	1			T22	2		T77	1		T78	2
values[48]	69	1			T22	3		T77	1		T78	5
values[49]	55	1			T22	2		T77	1		T78	4
values[50]	55	1			T22	2		T77	1		T78	2
values[51]	58	1			T22	2		T77	1		T78	2
values[52]	66	1			T22	2		T77	1		T78	4
values[53]	67	1			T22	2		T77	1		T78	8
values[54]	70	1			T22	2		T77	1		T78	7
values[55]	66	1			T22	2		T77	1		T78	7
values[56]	66	1			T22	2		T77	1		T78	3
values[57]	75	1			T22	2		T77	1		T78	3
values[58]	70	1			T22	2		T77	1		T78	2
values[59]	66	1			T22	2		T77	1		T78	2
values[60]	71	1			T22	2		T77	1		T78	1
values[61]	68	1			T22	2		T77	1		T78	2
values[62]	66	1			T22	2		T77	1		T78	1
values[63]	66	1			T22	2		T77	1		T78	6
values[64]	54	1			T22	3		T77	1		T78	2
values[65]	65	1			T22	2		T77	1		T78	2
values[66]	66	1			T22	2		T77	1		T78	1
values[67]	60	1			T22	2		T77	1		T78	1
values[68]	60	1			T22	2		T77	1		T78	4
values[69]	66	1			T22	2		T77	1		T78	7
values[70]	71	1			T22	2		T77	1		T78	2
values[71]	61	1			T22	2		T77	1		T78	3
values[72]	59	1			T22	2		T77	1		T78	2
values[73]	71	1			T22	2		T77	1		T78	3
values[74]	53	1			T22	2		T77	1		T78	2
values[75]	66	1			T22	2		T77	1		T78	5
values[76]	66	1			T22	2		T77	1		T78	1
values[77]	54	1			T22	2		T77	1		T78	1
values[78]	74	1			T22	2		T77	1		T78	3
values[79]	71	1			T22	2		T77	1		T78	2
values[80]	67	1			T22	2		T77	1		T78	2
values[81]	86	1			T22	2		T77	1		T78	3
values[82]	74	1			T22	2		T77	1		T78	1
values[83]	74	1			T22	2		T77	1		T78	1
values[84]	83	1			T22	2		T77	1		T78	6
values[85]	104	1			T22	2		T77	1		T78	8
values[86]	86	1			T22	2		T77	1		T78	4
values[87]	84	1			T22	2		T77	1		T78	3
values[88]	83	1			T22	2		T77	1		T78	2
values[89]	83	1			T22	2		T77	1		T78	3
values[90]	91	1			T22	2		T77	1		T78	2
values[91]	96	1			T22	2		T77	1		T78	6
values[92]	89	1			T22	2		T77	1		T78	5
values[93]	80	1			T22	2		T77	1		T78	5
values[94]	90	1			T22	2		T77	1		T78	2
values[95]	99	1			T22	2		T77	1		T78	2
values[96]	102	1			T22	2		T77	1		T78	7
values[97]	91	1			T22	2		T77	1		T78	5
values[98]	84	1			T22	2		T77	1		T78	3
values[99]	95	1			T22	2		T77	1		T78	6
values[100]	107	1			T22	2		T77	1		T78	3
values[101]	102	1			T22	2		T77	1		T78	2
values[102]	89	1			T22	2		T77	1		T78	1
values[103]	95	1			T22	3		T77	2		T78	5
values[104]	106	1			T22	3		T77	1		T78	5
values[105]	103	1			T22	6		T77	6		T78	4
values[106]	118	1			T22	6		T77	2		T78	2
values[107]	134	1			T22	6		T77	1		T78	5
values[108]	124	1			T22	2		T77	1		T78	5
values[109]	121	1			T22	3		T77	7		T78	3
values[110]	129	1			T22	4		T77	3		T78	2
values[111]	120	1			T22	3		T77	2		T78	5
values[112]	109	1			T22	2		T77	3		T78	5
values[113]	142	1			T22	2		T77	2		T78	8
values[114]	122	1			T22	2		T77	2		T78	13
values[115]	121	1			T22	3		T77	2		T78	8
values[116]	121	1			T22	4		T77	1		T78	7
values[117]	129	1			T22	3		T77	3		T78	1
values[118]	135	1			T22	6		T77	2		T78	8
values[119]	125	1			T22	3		T77	3		T78	4
values[120]	104	1			T22	4		T77	2		T78	11
values[121]	111	1			T22	5		T77	5		T78	5
values[122]	126	1			T22	2		T77	5		T78	2
values[123]	136	1			T22	3		T77	4		T73	8
values[124]	190	1			T22	5		T77	3		T73	8
values[125]	369	1			T22	2		T77	3		T73	6
values[126]	827	1			T22	13		T77	8		T73	48
values[127]	2864	1			T22	215		T77	129		T73	379
values[128]	4652	1			T22	415		T77	174		T73	579