Unified Coverage Report :: Group :: xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

Group : xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

---

Summary for Group xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	64	0	64	100.00

Variables for Group xbar_env_pkg::same_source_access_cg::SHAPE{(num_source - 1)=63}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	64	0	64	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	64	0	64	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	2103	1			T16	15		T20	29		T23	22
all_values[1]	2000	1			T14	3		T16	11		T20	25
all_values[2]	1964	1			T14	1		T16	14		T20	26
all_values[3]	1977	1			T14	3		T16	11		T20	18
all_values[4]	2053	1			T14	2		T16	16		T20	25
all_values[5]	2032	1			T14	4		T16	21		T20	26
all_values[6]	1997	1			T14	3		T16	10		T20	25
all_values[7]	2024	1			T16	11		T20	30		T34	3
all_values[8]	1985	1			T14	2		T16	6		T20	22
all_values[9]	2025	1			T14	2		T16	12		T20	24
all_values[10]	2024	1			T14	3		T16	15		T20	22
all_values[11]	1950	1			T14	1		T16	13		T20	20
all_values[12]	1997	1			T14	2		T16	14		T20	19
all_values[13]	2085	1			T14	4		T16	9		T20	24
all_values[14]	2010	1			T14	5		T16	9		T20	23
all_values[15]	1984	1			T14	3		T16	18		T20	24
all_values[16]	2105	1			T14	3		T16	15		T20	27
all_values[17]	1976	1			T14	3		T16	9		T20	19
all_values[18]	2026	1			T14	3		T16	11		T20	27
all_values[19]	1948	1			T14	5		T16	19		T20	31
all_values[20]	1987	1			T14	2		T16	13		T20	31
all_values[21]	2006	1			T14	2		T16	9		T20	22
all_values[22]	2052	1			T14	3		T16	7		T20	17
all_values[23]	2095	1			T14	1		T16	19		T20	31
all_values[24]	2040	1			T16	9		T20	23		T34	1
all_values[25]	1908	1			T14	3		T16	14		T20	27
all_values[26]	2046	1			T14	2		T16	19		T20	24
all_values[27]	2043	1			T14	3		T16	19		T20	23
all_values[28]	1960	1			T14	5		T16	19		T20	21
all_values[29]	1985	1			T14	7		T16	10		T20	20
all_values[30]	2013	1			T14	2		T16	15		T20	23
all_values[31]	2088	1			T14	5		T16	17		T20	24
all_values[32]	2007	1			T14	3		T16	13		T20	28
all_values[33]	2055	1			T16	14		T20	23		T23	19
all_values[34]	2032	1			T16	19		T20	19		T23	15
all_values[35]	1982	1			T14	4		T16	17		T20	24
all_values[36]	2016	1			T14	5		T16	13		T20	18
all_values[37]	1941	1			T16	13		T20	16		T34	1
all_values[38]	2036	1			T14	1		T16	13		T20	30
all_values[39]	1981	1			T14	5		T16	10		T20	28
all_values[40]	1980	1			T14	1		T16	14		T20	14
all_values[41]	2060	1			T16	13		T20	17		T34	1
all_values[42]	2060	1			T14	2		T16	14		T20	23
all_values[43]	2114	1			T16	18		T20	24		T34	1
all_values[44]	1964	1			T14	3		T16	19		T20	18
all_values[45]	2021	1			T14	5		T16	9		T20	33
all_values[46]	1974	1			T14	3		T16	10		T20	23
all_values[47]	2001	1			T14	1		T16	14		T20	27
all_values[48]	2048	1			T14	1		T16	8		T20	35
all_values[49]	2029	1			T14	2		T16	19		T20	19
all_values[50]	2000	1			T14	2		T16	8		T20	25
all_values[51]	2032	1			T14	1		T16	11		T20	28
all_values[52]	2046	1			T14	1		T16	10		T20	16
all_values[53]	1957	1			T14	1		T16	15		T20	22
all_values[54]	1945	1			T14	4		T16	10		T20	25
all_values[55]	1965	1			T14	1		T16	10		T20	26
all_values[56]	2041	1			T14	8		T16	15		T20	21
all_values[57]	2074	1			T14	3		T16	12		T20	28
all_values[58]	2078	1			T14	3		T16	21		T20	20
all_values[59]	1958	1			T14	4		T16	15		T20	13
all_values[60]	2093	1			T14	2		T16	15		T20	25
all_values[61]	2002	1			T14	2		T16	11		T20	17
all_values[62]	1982	1			T16	13		T20	22		T34	1
all_values[63]	2013	1			T14	1		T16	16		T20	20