Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 501 1 T13 1 T14 1 T43 2
all_values[1] 550 1 T5 2 T14 1 T34 2
all_values[2] 542 1 T5 1 T14 1 T18 1
all_values[3] 511 1 T18 3 T66 2 T21 1
all_values[4] 512 1 T5 1 T34 2 T18 1
all_values[5] 504 1 T14 1 T25 2 T203 1
all_values[6] 551 1 T14 1 T34 2 T18 1
all_values[7] 537 1 T13 1 T14 1 T34 2
all_values[8] 526 1 T66 3 T21 2 T79 1
all_values[9] 544 1 T13 1 T43 1 T79 2
all_values[10] 478 1 T13 1 T34 2 T21 1
all_values[11] 526 1 T13 1 T14 2 T43 2
all_values[12] 485 1 T18 2 T25 2 T201 1
all_values[13] 486 1 T14 1 T18 1 T66 1
all_values[14] 487 1 T13 1 T34 1 T18 1
all_values[15] 481 1 T18 1 T43 2 T79 1
all_values[16] 501 1 T64 1 T18 2 T21 1
all_values[17] 516 1 T14 1 T34 1 T66 1
all_values[18] 499 1 T64 1 T34 3 T66 1
all_values[19] 512 1 T34 1 T66 2 T43 1
all_values[20] 537 1 T43 1 T79 2 T82 1
all_values[21] 511 1 T9 1 T34 1 T18 1
all_values[22] 530 1 T14 1 T21 3 T43 4
all_values[23] 494 1 T13 2 T14 1 T79 1

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