Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 468 1 T11 9 T12 3 T17 1
all_values[1] 490 1 T10 1 T11 6 T12 8
all_values[2] 513 1 T11 7 T12 5 T15 2
all_values[3] 532 1 T11 5 T12 5 T15 2
all_values[4] 476 1 T11 7 T12 1 T41 2
all_values[5] 448 1 T11 8 T12 3 T15 2
all_values[6] 463 1 T11 6 T12 2 T15 1
all_values[7] 487 1 T10 1 T11 3 T12 3
all_values[8] 506 1 T11 10 T12 5 T15 2
all_values[9] 484 1 T11 6 T12 3 T15 1
all_values[10] 470 1 T11 4 T12 1 T15 1
all_values[11] 511 1 T11 5 T12 2 T15 1
all_values[12] 454 1 T11 1 T12 1 T15 1
all_values[13] 506 1 T10 1 T11 4 T12 5
all_values[14] 470 1 T11 4 T12 4 T17 1
all_values[15] 520 1 T11 4 T12 6 T15 1
all_values[16] 468 1 T11 5 T12 2 T17 2
all_values[17] 492 1 T11 4 T12 5 T15 2
all_values[18] 455 1 T11 7 T12 3 T15 1
all_values[19] 498 1 T11 2 T12 8 T17 1
all_values[20] 448 1 T11 3 T12 3 T15 2
all_values[21] 490 1 T11 12 T12 5 T15 3
all_values[22] 508 1 T11 6 T12 4 T17 2
all_values[23] 492 1 T11 7 T12 6 T15 2

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