Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 542 1 T7 12 T16 1 T22 1
all_values[1] 530 1 T7 6 T16 3 T22 1
all_values[2] 504 1 T7 11 T16 2 T22 1
all_values[3] 490 1 T7 17 T10 1 T16 1
all_values[4] 517 1 T7 12 T16 2 T22 1
all_values[5] 533 1 T7 10 T16 1 T22 1
all_values[6] 512 1 T7 6 T34 2 T63 1
all_values[7] 496 1 T7 13 T22 1 T34 2
all_values[8] 526 1 T7 10 T10 2 T16 3
all_values[9] 527 1 T7 21 T16 2 T22 1
all_values[10] 516 1 T7 15 T34 1 T36 2
all_values[11] 461 1 T7 8 T16 1 T34 1
all_values[12] 477 1 T7 10 T34 1 T36 2
all_values[13] 509 1 T7 7 T16 2 T22 1
all_values[14] 507 1 T7 13 T16 2 T34 1
all_values[15] 513 1 T7 5 T16 1 T22 1
all_values[16] 519 1 T7 12 T16 1 T34 2
all_values[17] 492 1 T7 5 T10 1 T34 2
all_values[18] 478 1 T7 9 T22 1 T36 2
all_values[19] 510 1 T7 10 T10 1 T16 2
all_values[20] 491 1 T7 11 T16 3 T22 1
all_values[21] 513 1 T7 10 T34 1 T36 1
all_values[22] 526 1 T7 5 T16 1 T22 1
all_values[23] 536 1 T7 11 T16 1 T22 1

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