Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 489 1 T15 7 T16 6 T19 4
all_values[1] 507 1 T15 5 T16 8 T19 2
all_values[2] 483 1 T15 7 T16 6 T18 1
all_values[3] 542 1 T15 9 T16 5 T18 1
all_values[4] 462 1 T36 1 T15 7 T16 7
all_values[5] 455 1 T36 2 T15 7 T16 3
all_values[6] 487 1 T15 9 T16 9 T18 1
all_values[7] 474 1 T15 6 T16 8 T18 1
all_values[8] 468 1 T15 7 T16 6 T18 1
all_values[9] 513 1 T36 2 T15 5 T16 10
all_values[10] 508 1 T15 4 T16 4 T18 1
all_values[11] 541 1 T36 1 T15 8 T16 5
all_values[12] 469 1 T15 6 T16 2 T71 1
all_values[13] 545 1 T30 1 T15 7 T16 6
all_values[14] 467 1 T15 5 T16 4 T18 1
all_values[15] 510 1 T15 10 T16 6 T18 1
all_values[16] 490 1 T15 10 T16 5 T19 2
all_values[17] 508 1 T30 1 T15 7 T16 2
all_values[18] 497 1 T15 7 T16 6 T19 8
all_values[19] 522 1 T15 10 T16 9 T19 3
all_values[20] 544 1 T36 2 T15 5 T16 7
all_values[21] 507 1 T15 11 T16 8 T18 1
all_values[22] 499 1 T15 5 T16 10 T18 1
all_values[23] 459 1 T15 7 T16 9 T288 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%