Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 498 1 T7 3 T8 2 T9 1
all_values[1] 510 1 T7 5 T8 1 T9 1
all_values[2] 501 1 T7 3 T9 2 T63 3
all_values[3] 490 1 T7 3 T9 1 T63 4
all_values[4] 470 1 T7 6 T8 1 T9 2
all_values[5] 510 1 T7 10 T8 1 T11 1
all_values[6] 537 1 T7 2 T9 5 T13 3
all_values[7] 522 1 T7 3 T9 1 T11 1
all_values[8] 515 1 T7 1 T9 1 T11 1
all_values[9] 497 1 T7 2 T8 1 T63 5
all_values[10] 496 1 T7 8 T9 3 T11 1
all_values[11] 479 1 T7 6 T9 1 T63 4
all_values[12] 505 1 T7 5 T8 1 T9 3
all_values[13] 500 1 T7 1 T9 1 T13 1
all_values[14] 500 1 T7 4 T8 1 T9 2
all_values[15] 530 1 T7 2 T8 1 T9 1
all_values[16] 496 1 T7 4 T9 1 T13 1
all_values[17] 524 1 T7 5 T8 1 T9 1
all_values[18] 503 1 T7 4 T8 3 T9 2
all_values[19] 519 1 T7 5 T9 1 T13 3
all_values[20] 500 1 T7 4 T8 1 T63 6
all_values[21] 554 1 T7 7 T9 1 T11 2
all_values[22] 484 1 T7 7 T9 2 T37 1
all_values[23] 509 1 T7 4 T11 1 T63 7

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