Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 469 1 T1 1 T2 14 T3 2
all_values[1] 491 1 T2 9 T3 2 T7 1
all_values[2] 516 1 T2 9 T3 2 T12 1
all_values[3] 484 1 T1 1 T2 7 T3 2
all_values[4] 486 1 T2 13 T3 3 T7 1
all_values[5] 480 1 T2 7 T3 1 T12 1
all_values[6] 549 1 T1 1 T2 15 T3 1
all_values[7] 497 1 T2 11 T3 3 T14 7
all_values[8] 492 1 T1 1 T2 7 T3 3
all_values[9] 493 1 T2 12 T3 6 T12 1
all_values[10] 507 1 T1 2 T2 13 T7 1
all_values[11] 499 1 T2 15 T3 2 T7 1
all_values[12] 503 1 T2 15 T3 2 T14 4
all_values[13] 465 1 T1 1 T2 7 T3 4
all_values[14] 510 1 T1 1 T2 10 T3 5
all_values[15] 450 1 T2 9 T3 4 T14 2
all_values[16] 495 1 T1 1 T2 8 T14 2
all_values[17] 530 1 T1 1 T2 11 T3 3
all_values[18] 514 1 T1 1 T2 8 T3 1
all_values[19] 507 1 T1 1 T2 9 T3 2
all_values[20] 485 1 T2 9 T3 1 T7 1
all_values[21] 480 1 T2 5 T3 3 T7 1
all_values[22] 522 1 T2 10 T14 3 T18 2
all_values[23] 500 1 T1 2 T2 11 T3 2

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