Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 497 1 T7 1 T13 1 T17 6
all_values[1] 492 1 T1 1 T7 4 T13 1
all_values[2] 559 1 T1 1 T7 2 T17 8
all_values[3] 474 1 T3 2 T7 2 T13 1
all_values[4] 510 1 T1 2 T7 4 T17 3
all_values[5] 531 1 T1 2 T7 6 T13 1
all_values[6] 500 1 T1 2 T3 2 T7 4
all_values[7] 487 1 T1 2 T3 1 T7 2
all_values[8] 490 1 T1 1 T3 1 T7 3
all_values[9] 464 1 T7 2 T13 1 T17 9
all_values[10] 513 1 T7 6 T62 1 T17 6
all_values[11] 505 1 T1 1 T7 6 T17 2
all_values[12] 512 1 T1 1 T7 2 T13 3
all_values[13] 488 1 T1 2 T3 1 T7 6
all_values[14] 508 1 T1 1 T7 3 T17 4
all_values[15] 517 1 T3 1 T7 3 T17 3
all_values[16] 481 1 T7 2 T13 1 T17 2
all_values[17] 524 1 T7 3 T13 1 T17 7
all_values[18] 535 1 T1 1 T3 1 T7 6
all_values[19] 508 1 T1 2 T7 3 T13 2
all_values[20] 497 1 T1 1 T7 4 T13 1
all_values[21] 532 1 T7 2 T13 1 T17 6
all_values[22] 529 1 T1 1 T3 1 T7 5
all_values[23] 514 1 T7 4 T13 1 T17 5

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