Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 448 1 T11 3 T14 3 T40 1
all_values[1] 455 1 T11 6 T14 1 T18 1
all_values[2] 466 1 T10 2 T11 3 T14 2
all_values[3] 447 1 T11 3 T14 2 T18 1
all_values[4] 416 1 T11 3 T39 1 T17 1
all_values[5] 467 1 T11 3 T14 3 T17 1
all_values[6] 460 1 T10 1 T11 7 T14 4
all_values[7] 474 1 T11 8 T14 3 T17 2
all_values[8] 469 1 T11 7 T14 1 T40 1
all_values[9] 451 1 T10 1 T11 7 T39 1
all_values[10] 457 1 T10 2 T11 2 T14 2
all_values[11] 477 1 T11 2 T39 1 T18 1
all_values[12] 478 1 T11 4 T39 1 T14 4
all_values[13] 472 1 T11 3 T14 5 T17 1
all_values[14] 492 1 T10 1 T11 7 T17 1
all_values[15] 457 1 T10 1 T11 4 T18 2
all_values[16] 431 1 T10 1 T11 2 T14 1
all_values[17] 412 1 T10 1 T11 4 T14 1
all_values[18] 479 1 T10 2 T11 2 T14 3
all_values[19] 471 1 T10 1 T11 4 T14 3
all_values[20] 453 1 T10 1 T11 9 T17 2
all_values[21] 495 1 T10 1 T11 2 T14 3
all_values[22] 413 1 T10 2 T11 6 T17 1
all_values[23] 443 1 T10 2 T11 3 T14 2

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