Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 24 0 24 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 24 0 24 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 24 0 24 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 455 1 T3 1 T9 1 T14 6
all_values[1] 449 1 T14 6 T17 4 T18 7
all_values[2] 443 1 T14 11 T17 2 T18 3
all_values[3] 468 1 T3 1 T14 4 T17 1
all_values[4] 475 1 T3 1 T14 11 T17 2
all_values[5] 439 1 T3 2 T14 7 T15 2
all_values[6] 460 1 T3 1 T14 12 T15 1
all_values[7] 488 1 T14 7 T15 1 T17 2
all_values[8] 415 1 T3 1 T14 7 T17 3
all_values[9] 463 1 T3 1 T14 8 T17 4
all_values[10] 509 1 T14 5 T15 3 T46 1
all_values[11] 476 1 T3 1 T9 1 T14 9
all_values[12] 457 1 T14 12 T15 2 T17 4
all_values[13] 486 1 T3 1 T14 3 T17 2
all_values[14] 459 1 T3 1 T14 3 T48 1
all_values[15] 471 1 T3 2 T14 5 T17 5
all_values[16] 467 1 T3 1 T14 4 T15 1
all_values[17] 456 1 T14 11 T15 1 T17 3
all_values[18] 460 1 T3 3 T14 7 T15 1
all_values[19] 490 1 T3 1 T14 6 T15 1
all_values[20] 495 1 T9 1 T14 9 T18 6
all_values[21] 462 1 T3 1 T14 10 T17 3
all_values[22] 520 1 T14 5 T17 2 T18 2
all_values[23] 442 1 T14 4 T15 3 T18 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%