Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_28/xbar_main-sim-vcs/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	24	0	24	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	24	0	24	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	24	0	24	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	562	1			T22	1		T58	2		T52	1
all_values[1]	508	1			T22	1		T81	1		T92	1
all_values[2]	516	1			T18	1		T22	1		T81	1
all_values[3]	472	1			T52	1		T53	1		T331	1
all_values[4]	553	1			T18	2		T52	1		T53	3
all_values[5]	531	1			T18	1		T58	1		T52	1
all_values[6]	548	1			T22	2		T52	1		T92	4
all_values[7]	495	1			T18	1		T81	2		T93	1
all_values[8]	540	1			T18	2		T81	3		T52	1
all_values[9]	537	1			T22	1		T81	1		T53	2
all_values[10]	504	1			T18	1		T22	1		T52	1
all_values[11]	517	1			T18	2		T58	1		T52	2
all_values[12]	533	1			T18	1		T22	2		T58	1
all_values[13]	528	1			T22	1		T58	1		T81	2
all_values[14]	490	1			T22	2		T58	1		T81	1
all_values[15]	546	1			T18	1		T81	2		T52	2
all_values[16]	535	1			T18	3		T81	1		T52	4
all_values[17]	535	1			T22	1		T58	1		T81	2
all_values[18]	515	1			T18	3		T22	2		T52	1
all_values[19]	541	1			T81	1		T52	2		T53	1
all_values[20]	541	1			T18	2		T22	1		T53	1
all_values[21]	505	1			T18	2		T58	1		T331	3
all_values[22]	524	1			T18	1		T58	1		T81	2
all_values[23]	524	1			T58	1		T81	1		T52	1