Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_31/xbar_main-sim-vcs/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	24	0	24	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	24	0	24	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	24	0	24	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	495	1			T18	1		T36	1		T269	1
all_values[1]	469	1			T47	1		T36	3		T269	2
all_values[2]	465	1			T18	1		T36	2		T48	2
all_values[3]	516	1			T48	1		T269	1		T34	2
all_values[4]	510	1			T36	1		T269	1		T77	1
all_values[5]	496	1			T18	1		T36	1		T48	2
all_values[6]	459	1			T47	1		T36	4		T48	1
all_values[7]	507	1			T36	3		T48	1		T269	1
all_values[8]	506	1			T9	1		T47	1		T36	2
all_values[9]	475	1			T48	1		T35	1		T183	1
all_values[10]	481	1			T36	1		T269	3		T77	2
all_values[11]	501	1			T47	1		T48	1		T77	2
all_values[12]	500	1			T36	3		T48	2		T269	2
all_values[13]	478	1			T48	1		T77	2		T35	2
all_values[14]	481	1			T47	2		T36	1		T269	1
all_values[15]	491	1			T269	1		T35	1		T183	3
all_values[16]	467	1			T36	3		T269	1		T77	1
all_values[17]	466	1			T36	4		T269	2		T183	1
all_values[18]	472	1			T47	1		T36	2		T269	1
all_values[19]	473	1			T36	3		T269	1		T34	1
all_values[20]	538	1			T48	3		T269	1		T77	1
all_values[21]	474	1			T269	1		T34	1		T35	3
all_values[22]	537	1			T36	1		T269	1		T77	1
all_values[23]	453	1			T36	3		T35	1		T183	3