Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_08/xbar_main-sim-vcs/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

---

Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	24	0	24	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	24	0	24	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	24	0	24	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	507	1			T39	1		T79	1		T178	3
all_values[1]	457	1			T20	1		T39	1		T48	1
all_values[2]	453	1			T20	1		T39	2		T48	3
all_values[3]	470	1			T20	3		T39	1		T48	2
all_values[4]	434	1			T271	1		T48	2		T79	1
all_values[5]	448	1			T48	1		T178	1		T81	1
all_values[6]	465	1			T11	1		T39	1		T48	2
all_values[7]	468	1			T39	1		T271	1		T48	1
all_values[8]	495	1			T22	1		T39	2		T271	1
all_values[9]	432	1			T11	1		T26	1		T39	1
all_values[10]	453	1			T39	2		T271	1		T48	1
all_values[11]	482	1			T20	1		T39	3		T48	2
all_values[12]	456	1			T22	1		T271	1		T48	4
all_values[13]	476	1			T20	2		T39	2		T48	3
all_values[14]	472	1			T271	1		T114	3		T79	1
all_values[15]	488	1			T20	2		T39	3		T48	4
all_values[16]	462	1			T11	1		T20	1		T39	4
all_values[17]	467	1			T26	1		T20	4		T39	1
all_values[18]	502	1			T271	1		T48	1		T114	1
all_values[19]	471	1			T20	1		T39	2		T48	2
all_values[20]	451	1			T20	1		T39	2		T48	3
all_values[21]	475	1			T11	1		T39	3		T48	2
all_values[22]	480	1			T26	1		T20	1		T39	1
all_values[23]	417	1			T11	1		T20	2		T22	1