Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_09_23/xbar_main-sim-vcs/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	24	0	24	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=23}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	24	0	24	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	24	0	24	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	475	1			T21	2		T49	2		T122	1
all_values[1]	488	1			T21	1		T47	1		T80	2
all_values[2]	480	1			T21	1		T80	1		T49	2
all_values[3]	467	1			T26	1		T21	1		T47	1
all_values[4]	480	1			T47	1		T49	3		T122	3
all_values[5]	498	1			T47	1		T49	1		T122	3
all_values[6]	504	1			T26	1		T80	2		T49	1
all_values[7]	475	1			T21	1		T47	1		T77	1
all_values[8]	476	1			T26	2		T21	1		T47	1
all_values[9]	472	1			T26	1		T21	1		T49	1
all_values[10]	505	1			T163	1		T77	1		T49	1
all_values[11]	515	1			T26	1		T21	1		T47	2
all_values[12]	452	1			T49	2		T122	2		T32	2
all_values[13]	513	1			T21	1		T47	1		T80	1
all_values[14]	460	1			T21	1		T80	1		T122	1
all_values[15]	453	1			T47	1		T32	6		T186	2
all_values[16]	470	1			T26	1		T21	1		T32	1
all_values[17]	486	1			T21	2		T80	2		T186	1
all_values[18]	499	1			T21	1		T77	1		T122	4
all_values[19]	477	1			T21	1		T47	1		T80	1
all_values[20]	462	1			T26	2		T163	1		T21	2
all_values[21]	480	1			T122	4		T32	1		T252	1
all_values[22]	482	1			T21	1		T80	2		T32	4
all_values[23]	428	1			T21	1		T80	3		T122	2