Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 448 1 T1 2 T2 1 T15 2
all_values[1] 439 1 T1 2 T2 1 T18 1
all_values[2] 486 1 T1 1 T2 2 T15 8
all_values[3] 457 1 T1 1 T2 3 T15 4
all_values[4] 478 1 T1 1 T2 3 T18 1
all_values[5] 441 1 T2 2 T18 1 T15 3
all_values[6] 449 1 T2 1 T18 1 T15 5
all_values[7] 484 1 T1 1 T2 1 T15 6
all_values[8] 446 1 T2 1 T15 2 T28 1
all_values[9] 476 1 T2 2 T15 4 T49 2
all_values[10] 427 1 T1 1 T2 1 T18 1
all_values[11] 449 1 T1 1 T18 1 T15 4
all_values[12] 435 1 T15 5 T28 1 T52 2
all_values[13] 438 1 T2 2 T15 4 T28 2
all_values[14] 452 1 T1 2 T2 1 T18 1
all_values[15] 452 1 T2 1 T18 3 T15 2
all_values[16] 457 1 T1 2 T2 1 T18 1
all_values[17] 422 1 T1 1 T18 1 T15 4
all_values[18] 487 1 T2 1 T18 1 T15 3
all_values[19] 428 1 T18 1 T15 1 T49 1
all_values[20] 446 1 T1 2 T2 2 T18 1
all_values[21] 454 1 T2 3 T15 4 T49 1
all_values[22] 437 1 T15 6 T268 1 T40 2
all_values[23] 424 1 T1 1 T2 2 T18 1
all_values[24] 490 1 T1 1 T2 3 T15 6
all_values[25] 426 1 T2 2 T52 1 T40 1
all_values[26] 474 1 T1 1 T2 2 T15 7

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