Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 492 1 T3 1 T5 1 T12 1
all_values[1] 491 1 T3 4 T5 2 T12 2
all_values[2] 474 1 T3 5 T13 7 T15 1
all_values[3] 506 1 T3 1 T12 1 T13 5
all_values[4] 503 1 T3 3 T5 2 T12 1
all_values[5] 507 1 T3 1 T5 1 T12 1
all_values[6] 482 1 T3 2 T5 1 T13 7
all_values[7] 452 1 T3 3 T13 9 T15 1
all_values[8] 487 1 T3 1 T5 1 T13 7
all_values[9] 462 1 T3 1 T12 1 T13 9
all_values[10] 478 1 T5 1 T13 2 T19 8
all_values[11] 447 1 T3 2 T13 6 T19 11
all_values[12] 474 1 T3 4 T5 1 T13 9
all_values[13] 479 1 T3 2 T12 1 T13 7
all_values[14] 441 1 T3 1 T13 4 T19 9
all_values[15] 475 1 T3 1 T5 1 T13 2
all_values[16] 508 1 T5 2 T13 8 T19 7
all_values[17] 514 1 T3 6 T12 1 T13 10
all_values[18] 463 1 T5 2 T13 11 T15 1
all_values[19] 468 1 T3 2 T13 5 T19 5
all_values[20] 490 1 T3 3 T13 2 T15 1
all_values[21] 487 1 T3 3 T5 1 T13 6
all_values[22] 471 1 T3 1 T13 4 T19 5
all_values[23] 496 1 T3 3 T12 1 T13 3
all_values[24] 484 1 T3 4 T12 3 T13 7
all_values[25] 465 1 T3 1 T5 3 T12 1
all_values[26] 448 1 T3 4 T13 6 T19 5

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