748235cbb6| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | xbar_smoke | xbar_smoke | 1.770s | 563.669us | 48 | 50 | 96.00 |
| V1 | TOTAL | 48 | 50 | 96.00 | |||
| V2 | xbar_base_random_sequence | xbar_random | 13.980s | 2.332ms | 45 | 50 | 90.00 |
| V2 | xbar_random_delay | xbar_smoke_zero_delays | 1.370s | 9.389us | 48 | 50 | 96.00 |
| xbar_smoke_large_delays | 13.220s | 2.991ms | 48 | 50 | 96.00 | ||
| xbar_smoke_slow_rsp | 14.670s | 4.452ms | 46 | 50 | 92.00 | ||
| xbar_random_zero_delays | 8.890s | 128.614us | 49 | 50 | 98.00 | ||
| xbar_random_large_delays | 3.198m | 257.878ms | 48 | 50 | 96.00 | ||
| xbar_random_slow_rsp | 3.356m | 107.837ms | 49 | 50 | 98.00 | ||
| V2 | xbar_unmapped_address | xbar_unmapped_addr | 11.730s | 766.262us | 48 | 50 | 96.00 |
| xbar_error_and_unmapped_addr | 10.270s | 2.769ms | 47 | 50 | 94.00 | ||
| V2 | xbar_error_cases | xbar_error_random | 13.230s | 913.442us | 47 | 50 | 94.00 |
| xbar_error_and_unmapped_addr | 10.270s | 2.769ms | 47 | 50 | 94.00 | ||
| V2 | xbar_all_access_same_device | xbar_access_same_device | 23.570s | 2.011ms | 47 | 50 | 94.00 |
| xbar_access_same_device_slow_rsp | 5.921m | 85.531ms | 48 | 50 | 96.00 | ||
| V2 | xbar_all_hosts_use_same_source_id | xbar_same_source | 13.090s | 4.604ms | 46 | 50 | 92.00 |
| V2 | xbar_stress_all | xbar_stress_all | 1.841m | 7.157ms | 46 | 50 | 92.00 |
| xbar_stress_all_with_error | 1.606m | 9.687ms | 49 | 50 | 98.00 | ||
| V2 | xbar_stress_with_reset | xbar_stress_all_with_rand_reset | 3.658m | 6.705ms | 48 | 50 | 96.00 |
| xbar_stress_all_with_reset_error | 3.268m | 3.435ms | 49 | 50 | 98.00 | ||
| V2 | TOTAL | 808 | 850 | 95.06 | |||
| V2S | TOTAL | 0 | 0 | -- | |||
| V3 | TOTAL | 0 | 0 | -- | |||
| TOTAL | 856 | 900 | 95.11 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| V1 | 1 | 1 | 0 | 0.00 |
| V2 | 17 | 17 | 0 | 0.00 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 99.22 | 100.00 | 95.34 | 100.00 | -- | 100.00 | 100.00 | 100.00 |
Exit reason: Error: User command failed Job returned non-zero exit code has 44 failures:
Test xbar_smoke has 2 failures.
0.xbar_smoke.77491259398471996990070417044946723233164545760636400573580328720642028911219
Log /container/opentitan-public/scratch/os_regression/xbar_peri-sim-vcs/0.xbar_smoke/latest/run.log
[make]: simulate
cd /workspace/0.xbar_smoke/latest && /workspace/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=623426163 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_smoke.623426163
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 3 12:38 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
17.xbar_smoke.79812031353734484124448871411646607823063511594230379395312041820847476892596
Log /container/opentitan-public/scratch/os_regression/xbar_peri-sim-vcs/17.xbar_smoke/latest/run.log
[make]: simulate
cd /workspace/17.xbar_smoke/latest && /workspace/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2748375988 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 17.xbar_smoke.2748375988
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 3 12:38 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
Test xbar_smoke_slow_rsp has 4 failures.
0.xbar_smoke_slow_rsp.26506766992225587022839803625391127264356559211130437115801500118515794227021
Log /container/opentitan-public/scratch/os_regression/xbar_peri-sim-vcs/0.xbar_smoke_slow_rsp/latest/run.log
[make]: simulate
cd /workspace/0.xbar_smoke_slow_rsp/latest && /workspace/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_req_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=373731149 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 0.xbar_smoke_slow_rsp.373731149
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 3 12:37 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
12.xbar_smoke_slow_rsp.7741973676699454657239310685143958063440460432417923061178974638780650693552
Log /container/opentitan-public/scratch/os_regression/xbar_peri-sim-vcs/12.xbar_smoke_slow_rsp/latest/run.log
[make]: simulate
cd /workspace/12.xbar_smoke_slow_rsp/latest && /workspace/xbar_build_mode/simv +max_host_req_delay=10 +max_host_rsp_delay=1000 +max_device_req_delay=1000 +max_device_rsp_delay=10 +max_host_valid_len=2000 +max_device_valid_len=2000 +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1940464560 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_TEST_SEQ=xbar_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 12.xbar_smoke_slow_rsp.1940464560
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 3 12:38 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
... and 2 more failures.
Test xbar_error_random has 3 failures.
1.xbar_error_random.93422106410422296566582086638064517496458099197520447446617023219089626014985
Log /container/opentitan-public/scratch/os_regression/xbar_peri-sim-vcs/1.xbar_error_random/latest/run.log
[make]: simulate
cd /workspace/1.xbar_error_random/latest && /workspace/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=2129569033 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 1.xbar_error_random.2129569033
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 3 12:37 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
5.xbar_error_random.101273969900026976295327352785538042195954109826540120076839952724797991373587
Log /container/opentitan-public/scratch/os_regression/xbar_peri-sim-vcs/5.xbar_error_random/latest/run.log
[make]: simulate
cd /workspace/5.xbar_error_random/latest && /workspace/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=4181150483 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UVM_TEST_SEQ=xbar_random_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 5.xbar_error_random.4181150483
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 3 12:38 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
... and 1 more failures.
Test xbar_unmapped_addr has 2 failures.
2.xbar_unmapped_addr.4763404534681359794008724162099712742849482783150444347741224947515938792569
Log /container/opentitan-public/scratch/os_regression/xbar_peri-sim-vcs/2.xbar_unmapped_addr/latest/run.log
[make]: simulate
cd /workspace/2.xbar_unmapped_addr/latest && /workspace/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=536306809 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 2.xbar_unmapped_addr.536306809
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 3 12:37 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
33.xbar_unmapped_addr.76389288931512226020388414634253091356858234582797440917498087774802222552170
Log /container/opentitan-public/scratch/os_regression/xbar_peri-sim-vcs/33.xbar_unmapped_addr/latest/run.log
[make]: simulate
cd /workspace/33.xbar_unmapped_addr/latest && /workspace/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=1180472426 -assert nopostproc +UVM_TESTNAME=xbar_base_test +UVM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 33.xbar_unmapped_addr.1180472426
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 3 12:39 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
Test xbar_error_and_unmapped_addr has 3 failures.
3.xbar_error_and_unmapped_addr.63601446883300225466011378034124992930644662144175175018512189209174999520410
Log /container/opentitan-public/scratch/os_regression/xbar_peri-sim-vcs/3.xbar_error_and_unmapped_addr/latest/run.log
[make]: simulate
cd /workspace/3.xbar_error_and_unmapped_addr/latest && /workspace/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=374822042 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UVM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 3.xbar_error_and_unmapped_addr.374822042
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 3 12:38 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
7.xbar_error_and_unmapped_addr.48340531970026731786548684855075489353093826827134044549253552203722031970829
Log /container/opentitan-public/scratch/os_regression/xbar_peri-sim-vcs/7.xbar_error_and_unmapped_addr/latest/run.log
[make]: simulate
cd /workspace/7.xbar_error_and_unmapped_addr/latest && /workspace/xbar_build_mode/simv +cdc_instrumentation_enabled=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspace/mnt/repo_top/hw/dv/tools/sim.tcl +ntb_random_seed=3192994317 -assert nopostproc +UVM_TESTNAME=xbar_error_test +UVM_TEST_SEQ=xbar_unmapped_addr_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspace/coverage/xbar_build_mode.vdb -cm_log /dev/null -cm_name 7.xbar_error_and_unmapped_addr.3192994317
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2_Full64; Runtime version T-2022.06-SP2_Full64; Jan 3 12:38 2024
Cannot find license file.
Make sure that you have a license file and that your
LM_LICENSE_FILE is pointing to the right location.
make: *** [/workspace/mnt/repo_top/hw/dv/tools/dvsim/sim.mk:175: simulate] Error 255
... and 1 more failures.
... and 13 more tests.