Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 431 1 T4 6 T20 1 T23 3
all_values[1] 487 1 T4 11 T18 1 T23 2
all_values[2] 461 1 T4 6 T17 1 T20 2
all_values[3] 464 1 T3 1 T4 6 T18 1
all_values[4] 432 1 T3 1 T4 11 T17 2
all_values[5] 442 1 T4 7 T18 1 T23 3
all_values[6] 471 1 T3 1 T4 11 T20 1
all_values[7] 454 1 T4 7 T20 1 T23 3
all_values[8] 443 1 T4 9 T17 1 T23 1
all_values[9] 426 1 T3 1 T4 6 T23 3
all_values[10] 474 1 T4 7 T20 1 T23 6
all_values[11] 512 1 T4 6 T18 1 T20 1
all_values[12] 438 1 T4 6 T17 2 T18 1
all_values[13] 469 1 T4 4 T17 2 T20 1
all_values[14] 437 1 T4 4 T17 1 T20 2
all_values[15] 442 1 T4 2 T18 2 T20 1
all_values[16] 430 1 T4 6 T23 1 T25 1
all_values[17] 442 1 T4 8 T20 3 T23 6
all_values[18] 425 1 T4 2 T20 1 T25 1
all_values[19] 441 1 T4 4 T17 2 T18 1
all_values[20] 453 1 T4 7 T17 1 T23 4
all_values[21] 463 1 T4 2 T18 1 T23 1
all_values[22] 476 1 T4 4 T17 1 T18 1
all_values[23] 451 1 T4 7 T17 1 T23 3
all_values[24] 452 1 T4 2 T17 2 T23 2
all_values[25] 505 1 T4 3 T18 1 T23 3
all_values[26] 464 1 T4 4 T17 1 T20 1

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