Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

---

Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	417	1			T16	1		T10	1		T38	5
all_values[1]	439	1			T15	1		T16	1		T10	3
all_values[2]	427	1			T10	1		T21	1		T36	1
all_values[3]	426	1			T10	2		T36	2		T38	8
all_values[4]	439	1			T16	2		T10	1		T36	3
all_values[5]	496	1			T15	1		T21	1		T38	1
all_values[6]	466	1			T15	1		T21	1		T39	2
all_values[7]	482	1			T16	1		T10	1		T38	5
all_values[8]	451	1			T10	1		T38	1		T55	1
all_values[9]	482	1			T15	1		T10	2		T38	8
all_values[10]	460	1			T15	1		T16	2		T10	2
all_values[11]	449	1			T15	1		T38	3		T55	3
all_values[12]	444	1			T10	2		T38	1		T55	1
all_values[13]	475	1			T15	1		T16	1		T10	1
all_values[14]	458	1			T10	3		T36	1		T39	2
all_values[15]	470	1			T15	1		T10	2		T39	1
all_values[16]	451	1			T10	3		T39	1		T38	4
all_values[17]	472	1			T10	2		T36	2		T38	1
all_values[18]	449	1			T15	1		T16	1		T55	1
all_values[19]	452	1			T16	1		T10	3		T36	1
all_values[20]	474	1			T15	1		T10	4		T21	1
all_values[21]	456	1			T16	1		T10	2		T36	2
all_values[22]	448	1			T38	2		T55	1		T44	5
all_values[23]	452	1			T10	3		T38	3		T55	2
all_values[24]	467	1			T16	2		T36	1		T38	3
all_values[25]	471	1			T15	1		T16	1		T10	1
all_values[26]	396	1			T38	2		T55	2		T44	2