Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 472 1 T11 13 T228 1 T39 1
all_values[1] 470 1 T15 1 T25 3 T11 6
all_values[2] 469 1 T15 1 T25 1 T11 3
all_values[3] 437 1 T15 2 T11 7 T228 1
all_values[4] 438 1 T15 2 T25 1 T11 9
all_values[5] 473 1 T11 6 T201 3 T45 2
all_values[6] 414 1 T11 5 T201 1 T57 2
all_values[7] 474 1 T15 1 T25 1 T11 8
all_values[8] 472 1 T11 4 T228 2 T201 2
all_values[9] 480 1 T11 7 T228 1 T201 3
all_values[10] 456 1 T15 1 T25 1 T11 8
all_values[11] 482 1 T15 1 T11 5 T228 1
all_values[12] 464 1 T11 9 T228 1 T201 1
all_values[13] 426 1 T15 1 T11 6 T201 3
all_values[14] 459 1 T15 2 T11 7 T201 15
all_values[15] 462 1 T15 1 T25 2 T11 7
all_values[16] 450 1 T11 6 T201 7 T47 1
all_values[17] 439 1 T15 1 T25 3 T11 6
all_values[18] 475 1 T15 1 T11 14 T201 2
all_values[19] 457 1 T15 1 T11 6 T201 7
all_values[20] 460 1 T15 1 T25 1 T11 7
all_values[21] 435 1 T15 1 T25 3 T11 6
all_values[22] 465 1 T25 1 T11 6 T228 1
all_values[23] 440 1 T11 4 T201 5 T45 1
all_values[24] 468 1 T25 1 T11 7 T201 9
all_values[25] 447 1 T25 1 T11 12 T228 1
all_values[26] 459 1 T15 1 T25 1 T11 10

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