Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 465 1 T1 6 T2 6 T4 3
all_values[1] 478 1 T1 4 T2 4 T16 1
all_values[2] 486 1 T1 1 T2 5 T4 3
all_values[3] 502 1 T1 2 T2 5 T4 4
all_values[4] 479 1 T2 1 T4 3 T19 11
all_values[5] 484 1 T1 2 T2 6 T4 2
all_values[6] 468 1 T1 1 T2 5 T4 3
all_values[7] 521 1 T1 1 T2 5 T4 4
all_values[8] 466 1 T1 9 T2 4 T4 1
all_values[9] 478 1 T1 2 T2 4 T4 2
all_values[10] 490 1 T1 2 T2 3 T4 3
all_values[11] 464 1 T1 4 T2 4 T4 5
all_values[12] 419 1 T1 5 T2 2 T4 1
all_values[13] 481 1 T1 7 T2 2 T4 2
all_values[14] 452 1 T1 4 T2 3 T4 3
all_values[15] 414 1 T1 3 T2 4 T4 2
all_values[16] 479 1 T1 2 T2 4 T4 4
all_values[17] 477 1 T1 2 T2 3 T4 4
all_values[18] 430 1 T1 1 T2 3 T4 2
all_values[19] 483 1 T1 3 T2 4 T4 4
all_values[20] 528 1 T1 3 T2 9 T4 4
all_values[21] 481 1 T1 4 T2 2 T4 3
all_values[22] 474 1 T1 2 T2 3 T4 1
all_values[23] 472 1 T1 5 T2 4 T4 5
all_values[24] 444 1 T1 8 T2 2 T4 1
all_values[25] 472 1 T1 4 T2 2 T4 3
all_values[26] 464 1 T1 7 T2 3 T4 1

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