Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
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Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv



Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 27 0 27 100.00


Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_dev 27 0 27 100.00 100 1 1 0


Summary for Variable cp_dev

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 27 0 27 100.00


User Defined Bins for cp_dev

Excluded/Illegal bins
NAMECOUNTSTATUS
bin_others 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_values[0] 479 1 T1 3 T3 4 T24 1
all_values[1] 456 1 T1 2 T3 6 T15 2
all_values[2] 464 1 T1 4 T3 1 T15 2
all_values[3] 410 1 T3 1 T24 3 T41 3
all_values[4] 437 1 T1 1 T3 5 T24 2
all_values[5] 463 1 T1 3 T3 5 T15 1
all_values[6] 485 1 T1 1 T3 6 T19 1
all_values[7] 460 1 T1 2 T3 6 T15 1
all_values[8] 445 1 T1 2 T3 7 T41 7
all_values[9] 437 1 T1 2 T3 5 T24 1
all_values[10] 465 1 T1 1 T3 1 T24 2
all_values[11] 492 1 T1 1 T3 5 T15 1
all_values[12] 446 1 T1 3 T3 4 T30 1
all_values[13] 427 1 T1 5 T3 3 T19 1
all_values[14] 419 1 T1 1 T3 2 T24 1
all_values[15] 442 1 T1 4 T3 2 T19 1
all_values[16] 419 1 T1 1 T3 4 T24 1
all_values[17] 445 1 T1 5 T3 4 T19 1
all_values[18] 478 1 T1 2 T3 3 T19 1
all_values[19] 403 1 T1 1 T3 4 T15 1
all_values[20] 414 1 T1 1 T3 2 T24 1
all_values[21] 450 1 T1 3 T3 2 T30 1
all_values[22] 434 1 T1 2 T3 3 T24 1
all_values[23] 459 1 T1 7 T3 6 T41 5
all_values[24] 421 1 T1 2 T3 1 T15 1
all_values[25] 423 1 T1 1 T3 4 T15 2
all_values[26] 434 1 T1 1 T3 3 T24 1

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