Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	379	1			T188	2		T24	5		T38	1
all_values[1]	407	1			T188	3		T24	5		T38	1
all_values[2]	440	1			T188	2		T24	1		T62	4
all_values[3]	453	1			T1	2		T188	4		T24	4
all_values[4]	449	1			T1	1		T16	1		T24	7
all_values[5]	447	1			T16	2		T24	6		T38	1
all_values[6]	421	1			T188	1		T24	4		T38	2
all_values[7]	445	1			T1	1		T16	1		T188	1
all_values[8]	434	1			T1	1		T24	4		T38	1
all_values[9]	413	1			T16	1		T188	1		T24	4
all_values[10]	449	1			T1	1		T24	6		T62	6
all_values[11]	415	1			T188	1		T24	4		T62	7
all_values[12]	425	1			T1	1		T16	1		T188	1
all_values[13]	443	1			T188	1		T24	9		T38	1
all_values[14]	425	1			T1	1		T188	1		T24	10
all_values[15]	406	1			T16	1		T188	2		T24	6
all_values[16]	416	1			T1	1		T188	3		T24	3
all_values[17]	409	1			T16	1		T188	4		T24	7
all_values[18]	420	1			T16	1		T188	2		T24	7
all_values[19]	427	1			T188	1		T24	5		T38	1
all_values[20]	474	1			T16	1		T24	5		T38	2
all_values[21]	444	1			T188	2		T24	6		T62	7
all_values[22]	464	1			T188	1		T24	10		T62	5
all_values[23]	439	1			T24	6		T38	1		T62	5
all_values[24]	430	1			T188	1		T24	7		T62	3
all_values[25]	431	1			T188	1		T24	6		T38	1
all_values[26]	409	1			T1	1		T188	2		T24	14