Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	436	1			T1	5		T188	6		T189	1
all_values[1]	423	1			T1	1		T13	1		T188	7
all_values[2]	455	1			T1	6		T188	9		T189	1
all_values[3]	467	1			T1	5		T188	5		T42	2
all_values[4]	452	1			T1	3		T188	4		T43	3
all_values[5]	432	1			T1	3		T188	7		T189	1
all_values[6]	434	1			T1	1		T188	1		T189	1
all_values[7]	438	1			T1	6		T188	2		T189	4
all_values[8]	444	1			T1	9		T188	4		T37	4
all_values[9]	453	1			T1	1		T188	5		T189	2
all_values[10]	455	1			T1	4		T188	3		T189	2
all_values[11]	458	1			T1	6		T188	7		T189	1
all_values[12]	438	1			T1	3		T188	11		T43	2
all_values[13]	454	1			T1	1		T188	7		T189	1
all_values[14]	475	1			T1	7		T188	7		T43	1
all_values[15]	450	1			T1	7		T188	6		T189	1
all_values[16]	466	1			T1	3		T13	1		T188	6
all_values[17]	468	1			T1	4		T188	10		T42	1
all_values[18]	464	1			T1	3		T188	5		T189	2
all_values[19]	449	1			T1	2		T188	5		T189	1
all_values[20]	474	1			T1	4		T188	4		T189	4
all_values[21]	457	1			T1	5		T188	3		T189	1
all_values[22]	460	1			T1	4		T188	4		T189	1
all_values[23]	439	1			T1	3		T188	3		T189	1
all_values[24]	471	1			T1	4		T188	5		T189	2
all_values[25]	449	1			T1	4		T188	2		T43	2
all_values[26]	474	1			T1	5		T188	8		T42	1