Unified Coverage Report :: Group :: xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

Group : xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/xbar_build_mode/sim-vcs/../src/lowrisc_dv_xbar_env_0.1/xbar_env_cov.sv

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Summary for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	27	0	27	100.00

Variables for Group xbar_env_pkg::same_device_access_cg::SHAPE{(num_dev - 1)=26}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_dev	27	0	27	100.00	100	1	1	0

Summary for Variable cp_dev

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	27	0	27	100.00

User Defined Bins for cp_dev

Excluded/Illegal bins

NAME	COUNT	STATUS
bin_others	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	490	1			T182	12		T19	1		T39	1
all_values[1]	472	1			T182	8		T27	1		T59	1
all_values[2]	481	1			T182	9		T59	1		T51	2
all_values[3]	464	1			T182	9		T59	1		T39	1
all_values[4]	462	1			T182	11		T19	2		T46	2
all_values[5]	517	1			T182	10		T27	1		T19	1
all_values[6]	480	1			T182	6		T19	1		T39	1
all_values[7]	486	1			T182	10		T19	3		T54	1
all_values[8]	446	1			T182	8		T19	2		T46	1
all_values[9]	475	1			T182	7		T27	1		T19	1
all_values[10]	472	1			T182	8		T27	2		T19	3
all_values[11]	484	1			T182	15		T27	1		T19	1
all_values[12]	460	1			T182	12		T19	2		T59	2
all_values[13]	450	1			T182	11		T46	1		T59	1
all_values[14]	471	1			T182	9		T27	2		T19	1
all_values[15]	503	1			T182	14		T27	2		T19	1
all_values[16]	496	1			T182	6		T27	1		T59	1
all_values[17]	434	1			T182	12		T27	3		T19	1
all_values[18]	463	1			T182	10		T27	1		T19	2
all_values[19]	452	1			T182	10		T27	3		T19	4
all_values[20]	550	1			T182	12		T19	5		T59	4
all_values[21]	447	1			T182	7		T27	1		T19	4
all_values[22]	482	1			T182	6		T19	1		T59	1
all_values[23]	476	1			T182	6		T27	3		T19	2
all_values[24]	512	1			T182	14		T27	2		T19	1
all_values[25]	441	1			T182	9		T19	2		T59	1
all_values[26]	512	1			T182	10		T27	3		T19	2